參數(shù)資料
型號: 4571
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
中文描述: 單芯片4位微機(jī)的CMOS
文件頁數(shù): 47/126頁
文件大?。?/td> 1627K
代理商: 4571
Rev.1.02
May 25, 2007
Page 27 of 124
REJ03B0179-0102
4571 Group
The 4571 Group timer consists of the following circuits.
Prescaler : 8-bit programmable timer
Timer 1 : 8-bit programmable timer
Timer 2 : 8-bit programmable timer
Timer 3 : 8-bit programmable timer
Watchdog timer: 16-bit fixed frequency timer
(Timers 1, 2 and 3 have the interrupt function, respectively)
Prescaler, timer 1, timer 2 and timer 3 can be controlled with the
timer control registers PA, W1, W2, W3 and W5. The watchdog
timer is a free counter which is not controlled with the control
register.
Each function is described below.
Table 16 Function related timers
Circuit
Structure
Count source
Frequency
dividing ratio
Use of output signal
Control
register
Prescaler
8-bit programmable
binary down counter
Instruction clock (INSTCK)
Instruction clock divided by 4
(INSTCK/4)
1 to 256
Timer 1 count source
Timer 2 count source
Timer 3 count source
PA
Timer 1
8-bit programmable
binary down counter
(link to INT0 input)
(carrier wave output auto-
control function)
PWM signal (PWMOUT)
Prescaler output (ORCLK)
CNTR0 input (CNTR0IN)
System clock (STCK)
1 to 256
Timer 2 count source
CNTR0 output
Carrier wave output auto-
control
Timer 1 interrupt
W1
W5
Timer 2
8-bit programmable
binary down counter
PWM signal (PWMOUT)
Timer 1 underflow (T1UDF)
Prescaler output (ORCLK)
System clock (STCK)
1 to 256
CNTR0 output
Timer 2 interrupt
W2
W5
Timer 3
8-bit programmable
binary down counter
(with carrier wave
generation function)
XIN input
Prescaler output divided by 2
(ORCLK/2)
1 to 256
Timer 1 count source
Timer 2 count source
CNTR1 output
Timer 3 interrupt
W1
W3
W5
Watchdog
timer
16-bit fixed dividing
frequency
Instruction clock (INSTCK)
65536
System reset (counting twice)
Decision of flag WDF1
-
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