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參數資料
| 型號： | 4571 |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片4位微機的CMOS |
| 文件頁數： | 33/126頁 |
| 文件大小： | 1627K |
| 代理商： | 4571 |
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Rev.1.02
May 25, 2007
Page 14 of 124
REJ03B0179-0102
4571 Group
(8) Program counter (PC)
Program counter (PC) is used to specify a ROM address (page
and address). It determines a sequence in which instructions
stored in ROM are read. It is a binary counter that increments the
number of instruction bytes each time an instruction is executed.
However, the value changes to a specified address when branch
instructions, subroutine call instructions, return instructions, or
the table reference instruction (TABP p) is executed.
Program counter consists of PCH (most significant bit to bit 7)
which specifies to a ROM page and PCL (bits 6 to 0) which
specifies an address within a page. After it reaches the last
address (address 127) of a page, it specifies address 0 of the next
page (Figure 13).
Make sure that the PCH does not specify after the last page of the
built-in ROM.
(9) Data pointer (DP)
Data pointer (DP) is used to specify a RAM address and consists
of registers Z, X, and Y. Register Z specifies a RAM file group,
register X specifies a file, and register Y specifies a RAM digit
(Figure 14).
Register Y is also used to specify the port D bit position.
When using port D, set the port D bit position to register Y
certainly and execute the SD, RD, or SZD instruction (Figure
15).
Note
Register Z of data pointer is undefined after system is released
from reset.
Also, registers Z, X and Y are undefined in the RAM back-up.
After system is returned from the RAM back-up, set these
registers.
Fig 13. Program counter (PC) structure
Fig 14. Data pointer (DP) structure
Fig 15. SD instruction execution example
a3
a2
a1
a0
a6
a5
a4
PCH
Specifying page
Program counter
p3
p2
p1
p0
p6
p5
p4
PCL
Specifying address
Register Y (4)
Data pointer (DP)
X2 X1 X0 Y3
Z1 Z0 X3
Y2 Y1 Y0
Register X (4)
Register Z (2)
Specifying
RAM digit
Specifying RAM file
Specifying RAM file group
Specifying bit position
0
1
Register Y (4)
Set
D3
D2
1
D1
D0
Port D output latch
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 4571_08 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Standard Characteristics |
| 45-710 | 制造商:GC Electronics 功能描述:EXTENSION CABLE, PARALLEL, 6FT, PUTTY; Cable Length - Imperial:6ft; Cable Length - Metric:1.83m; Connector Type A:Centronics 36 Position Plug; Connector Type B:Centronics 36 Position Receptacle; Jacket Color:Putty; Cable Color:Putty 制造商:Calrad Electronics 功能描述:Cable Assembly Parallel 6m 28AWG 36 POS SCSI to 36 POS SCSI M-F |
| 4-571011-3 | 功能描述:ANVIL 制造商:te connectivity amp connectors 系列:* 零件狀態(tài):有效 標準包裝:1 |
| 457102-1 | 制造商:TE Connectivity 功能描述:BLOCK, PLATE MTG - Bulk |
| 45710224PTC2103 | 制造商:Omron Corporation 功能描述: |
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