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參數(shù)資料
| 型號： | 29F800 |
| 廠商： | 意法半導體 |
| 英文描述： | 8 Mbit 1Mb x8 or 512Kb x16, Boot Block Single Supply Flash Memory |
| 中文描述： | 8兆1兆x8或512KB的x16插槽，啟動座單電源閃存 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大小： | 142K |
| 代理商： | 29F800 |
5/21
M29F800AT, M29F800AB
Table 4A. Bus Operations, BYTE = V
IL
Note: X = V
IL
or V
IH
.
Table 4B. Bus Operations, BYTE = V
IH
Note: X = V
IL
or V
IH
.
Operation
E
G
W
Address Inputs
DQ15A–1, A0-A18
Data Inputs/Outputs
DQ14-DQ8
DQ7-DQ0
Bus Read
V
IL
V
IL
V
IH
Cell Address
Hi-Z
Data Output
Bus Write
V
IL
V
IH
V
IL
Command Address
Hi-Z
Data Input
Output Disable
X
V
IH
V
IH
X
Hi-Z
Hi-Z
Standby
V
IH
X
X
X
Hi-Z
Hi-Z
Read Manufacturer
Code
V
IL
V
IL
V
IH
A0 = V
IL
, A1 = V
IL
, A9 = V
ID
,
Others V
IL
or V
IH
Hi-Z
20h
Read Device Code
V
IL
V
IL
V
IH
A0 = V
IH
, A1 = V
IL
, A9 = V
ID
,
Others V
IL
or V
IH
Hi-Z
ECh (M29F800AT)
58h (M29F800AB)
Operation
E
G
W
Address Inputs
A0-A18
Data Inputs/Outputs
DQ15A–1, DQ14-DQ0
Bus Read
V
IL
V
IL
V
IH
Cell Address
Data Output
Bus Write
V
IL
V
IH
V
IL
Command Address
Data Input
Output Disable
X
V
IH
V
IH
X
Hi-Z
Standby
V
IH
X
X
X
Hi-Z
Read Manufacturer
Code
V
IL
IL
V
IH
A0 = V
IL
, A1 = V
IL
, A9 = V
ID
,
Others V
IL
or V
IH
0020h
Read Device Code
V
IL
V
IL
V
IH
A0 = V
IH
, A1 = V
IL
, A9 = V
ID
,
Others V
IL
or V
IH
00ECh (M29F800AT)
0058h (M29F800AB)
V
CC
Supply Voltage.
The V
CC
Supply Voltage
supplies the power for all operations (Read, Pro-
gram, Erase etc.).
The Command Interface is disabled when the V
CC
Supply Voltage is less than the Lockout Voltage,
V
LKO
. Thisprevents Bus Write operations from ac-
cidentally damaging the data during power up,
power down and power surges. If the Program/
Erase Controller is programming or erasing during
this time then the operation aborts and the memo-
ry
contents
being
altered
A 0.1
μ
F capacitor should be connected between
the V
CC
Supply Voltage pin and the V
SS
Ground
pin to decouple the current surges from the power
supply. The PCB track widths must be sufficient to
carry the currents required during program and
erase operations, I
CC4
.
V
SS
Ground.
The V
SS
Groundis thereference for
all voltage measurements.
will
be
invalid.
BUS OPERATIONS
There arefive standard bus operations that control
the device. These are Bus Read, Bus Write, Out-
put Disable, Standby and Automatic Standby. See
Tables 4A and 4B, Bus Operations, for a summa-
ry. Typically glitches of less than 5ns on Chip En-
able or Write Enable are ignored by the memory
and do not affect bus operations.
Bus Read.
Bus Read operations read from the
memory cells, or specific registers in the Com-
mand Interface. A valid Bus Read operation in-
volves setting the desired address on the Address
Inputs, applying a Low signal, V
IL
, to Chip Enable
and Output Enable and keeping Write Enable
High, V
IH
. The Data Inputs/Outputs will output the
value, see Figure 7, Read Mode AC Waveforms,
and Table 11, Read AC Characteristics, for details
of when the output becomes valid.
Bus Write.
Bus Write operations write to the
Command Interface. A valid Bus Write operation
begins by setting the desired address on the Ad-
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