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November 1995
COPYRIGHT
INTEL CORPORATION, 1995
Order Number: 290450-005
4-MBlT (256K x 16, 512K x 8)
LOW-POWER BOOT BLOCK
FLASH MEMORY FAMILY
28F400BL-T/B, 28F004BL-T/B
Y
Low Voltage Operation for Very
Low-Power Portable Applications
D V
CC
e
3.0V–3.6V Read
D V
CC
e
3.15V–3.6V Program/Erase
Y
Expanded Temperature Range
D
b
20
§
C to
a
70
§
C
Y
x8/x16 Input/Output Architecture
D 28F400BL-T, 28F400BL-B
D For High Performance and High
Integration 16-bit and 32-bit CPUs
Y
x8-only Input/Output Architecture
D 28F004BL-T, 28F004BL-B
D For Space Constrained 8-bit
Applications
Y
Upgradeable to Intel’s SmartVoltage
Products
Y
Optimized High Density Blocked
Architecture
D One 16-KB Protected Boot Block
D Two 8-KB Parameter Blocks
D One 96-KB Main Block
D Three 128-KB Main Blocks
D Top or Bottom Boot Locations
Y
Extended Cycling Capability
D 10,000 Block Erase Cycles
Y
Automated Word/Byte Write and Block
Erase
D Command User Interface
D Status Registers
D Erase Suspend Capability
Y
SRAM-Compatible Write Interface
Y
Automatic Power Savings Feature
D 0.8 mA typical I
CC
Active Current in
Static Operation
Y
Very High-Performance Read
D 150 ns Maximum Access Time
D 65 ns Maximum Output Enable Time
Y
Low Power Consumption
D 15 mA Typical Active Read Current
Y
Reset/Deep Power-Down Input:
D 0.2
m
A I
CC
Typical
D Acts as Reset for Boot Operations
Y
Write Protection for Boot Block
Y
Hardware Data Protection Feature
D Erase/Write Lockout During Power
Transitions
Y
Industry Standard Surface Mount
Packaging
D 28F400BL: JEDEC ROM
Compatible
44-Lead PSOP
56-Lead TSOP
D 28F004BL: 40-Lead TSOP
Y
12V Word/Byte Write and Block Erase
D V
PP
e
12V
g
5% Standard
Y
ETOX
TM
III Flash Technology
D 3.3V Read