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參數(shù)資料
| 型號： | 28F032C3 |
| 英文描述： | 3 VOLT ADVANCED+ BOOT BLOCK. 8-. 16-. 32-MBIT FLASH MEMORY FAMILY |
| 中文描述： | 3伏高級啟動塊。 8 -. 16 -. 32 - Mbit閃存家庭 |
| 文件頁數(shù)： | 23/59頁 |
| 文件大?。?/td> | 384K |
| 代理商： | 28F032C3 |
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E
3 VOLT ADVANCED+ BOOT BLOCK
23
PRODUCT PREVIEW
V
CC
V
PP
12 V Fast Programming
Complete Write Protection When V
PP
≠
12 V
System Supply
12 V Supply
10 K
V
CC
V
PP
System Supply
12 V Supply
12 V Fast Programming
Full Array Protection Unavailable
V
CC
V
PP
System Supply
Prot#
(Logic Signal)
V
CC
V
PP
System Supply
Low-Voltage Programming Only
Full Array Protection Unavailable
Low-Voltage Programming Only
Logic Control of Complete Device Protection
(Note 1)
0645_06
NOTE:
1.
A resistor can be used if the V
CC
supply can sink adequate current based on resistor value. See AP-657 Designing with
the Advanced+ Boot Block Flash Memory Architecturefor details.
Figure 6. Example Power Supply Configurations
When V
PP
is raised to 12 V, such as in a
manufacturing situations, the device directly applies
the high voltage to achieve faster program and
erase.
Designing for in-system writes to the flash memory
requires special consideration of power supply
traces by the printed circuit board designer.
Adequate power supply traces, and decoupling
capacitors placed adjacent to the component, will
decrease spikes and overshoots.
3.6
Power Consumption
Intel’s flash devices have a tiered approach to
power savings that can significantly reduce overall
system power consumption. The Automatic Power
Savings (APS) feature reduces power consumption
when the device is selected but idle. If the CE# is
deasserted, the flash enters its standby mode,
where current consumption is even lower. The
combination of these features can minimize
memory power consumption, and therefore, overall
system power consumption.
3.6.1
ACTIVE POWER
(Program/Erase/Read)
With CE# at a logic
-
low level and RP# at a logic
-
high level, the device is in the active mode. Refer to
the DC Characteristic tables for I
CC
current values.
Active power is the largest contributor to overall
system power consumption. Minimizing the active
current could have a profound effect on system
power consumption, especially for battery
-
operated
devices.
3.6.2
AUTOMATIC POWER SAVINGS (APS)
Automatic Power Savings provides low
-
power
operation during read mode. After data is read from
the memory array and the address lines are
quiescent, APS circuitry places the device in a
mode where typical current is comparable to I
CCS
.
The flash stays in this static state with outputs valid
until a new location is read.
3.6.3
STANDBY POWER
With CE# at a logic
-
high level (V
IH
) and device in
read mode, the flash memory is in standby mode,
which disables much of the device’s circuitry and
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