參數(shù)資料
型號: 28F001BX
廠商: Intel Corp.
英文描述: 5 V Boot Block Flash Memory(5 V引導(dǎo)塊閃速存儲器)
中文描述: 5伏啟動塊閃存(5伏引導(dǎo)塊閃速存儲器)
文件頁數(shù): 11/39頁
文件大小: 648K
代理商: 28F001BX
E
Interface software to initiate and poll progress of
internal program and erase can be stored in any of
the 28F001BX blocks. This code is copied to, and
executed from, system RAM during actual flash
memory update. After successful completion of
program and/or erase, code execution out of the
28F001BX is again possible via the Read Array
command. Erase suspend/resume capability allows
system software to suspend block erase and read
data/execute code from any other block.
28F001BX
11
2.1
Command Register and Write
Automation
An on-chip state machine controls block erase and
byte program, freeing the system processor for
other tasks. After receiving the Erase Setup and
Erase Confirm commands, the state machine
controls block pre-conditioning and erase, returning
progress via the status register. Programming is
similarly controlled, after destination address and
expected data are supplied. The program algorithm
of past Intel Flash memories is now regulated by
the state machine, including program pulse
repetition where required and internal verification
and margining of data.
2.2
Data Protection
Depending on the application, the system designer
may choose to make the V
PP
power supply
switchable (available only when memory updates
are required) or hardwired to V
PPH
. When V
PP
=
V
PPL
, memory contents cannot be altered. The
28F001BX command register architecture provides
protection from unwanted program or erase
operations even when high voltage is applied to
V
PP
. Additionally, all functions are disabled
whenever V
CC
is below the write lockout voltage
V
LKO
, or when RP# is at V
IL
. The 28F001BX
accommodates
either
encourages optimization of the processor-memory
interface.
design
practice
and
The two-step program/erase write sequence to the
command register provides additional software
write protection.
8-Kbyte Boot Block
4-Kbyte Parameter Block
4-Kbyte Parameter Block
112-Kbyte Main Block
1FFFF
1E000
1DFFF
1D000
1CFFF
1C000
1BFFF
00000
0406_06
Figure 6. 28F001BX-T Memory Map
8-Kbyte Boot Block
4-Kbyte Parameter Block
4-Kbyte Parameter Block
112-Kbyte Main Block
1FFFF
04000
03FFF
03000
02FFF
02000
01FFF
00000
0406_07
Figure 7. 28F001BX-B Memory Map
3.0 BUS OPERATION
Flash memory reads, erases and writes in-system
via the local CPU. All bus cycles to or from the flash
memory conform to standard microprocessor bus
cycles.
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