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參數(shù)資料
| 型號： | 18V512JC |
| 廠商： | Xilinx, Inc. |
| 英文描述： | In-System Programmable Configuration PROMs |
| 中文描述： | 在系統(tǒng)可編程配置PROM的 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大?。?/td> | 230K |
| 代理商： | 18V512JC |
XC18V00 Series In-System Programmable Configuration PROMs
DS026 (v4.0) June 11, 2003
Product Specification
1-800-255-7778Figure 7:
(a) Master Serial Mode (b) Virtex/Virtex-E/Virtex-II Pro SelectMAP Mode (c) Spartan-II/Spartan-IIE
Slave-Parallel Mode (dotted lines indicate optional connection)
PROGRAM
DIN
CCLK
INIT
DONE
First
PROM
DATA
CEO
CLK
CE
OPTIONAL
Slave FPGAs
with identical
configurations
VCCINT
FPGA
VCCINT VCCO
OPTIONAL
Daisy-chained
FPGAs with
different
configurations
OE/RESET
DOUT
Modes
VCCO
CF
Vcco
4.7K
Vcco
(c) Spartan-II/Spartan-IIE Slave-Parallel Mode
(a) Master Serial Mode
DS026_05_060403
For Mode pin connections and Done pullup value, refer to the appropriate FPGA data sheet.
For compatible voltages, refer to the appropriate FPGA data sheet.
Cascaded
PROM
DATA
CLK
CE
OE/RESET
CF
Vcco
(1)
4.7K
PROGRAM
VIRTEX
Select MAP
BUSY
CS
WRITE
INIT
D[0:7]
CCLK
DONE
CE
OE/RESET
Modes
NC
Vcco
External
Osc
Vcco
1K
I/O
8
I/O
1K
CLK
D[0:7]
XC18Vxx
CF
CEO
VCCINT VCCO
VCCINT VCCO
(1)
(1)
(2)
(3)
CE
4.7K
Vcco
CLK
D[0:7]
OE/RESET
XC18Vxx
CF
CEO
VCCINT VCCO
VCCINT VCCO
PROGRAM
Spartan-II,
Spartan-IIE
BUSY
CS
WRITE
INIT
D[0:7]
CCLK
DONE
CE
OE/RESET
Modes
NC
Vcco
External
Osc
Vcco
1K
I/O
8
I/O
1K
CLK
D[0:7]
XC18Vxx
CF
VCCINT VCCO
VCCINT VCCO
(1)
(1)
(2)
(3)
4.7K
VCCINT
4.7K
3.3K
(b) Virtex/Virtex-E/Virtex-II/Virtex-II Pro SelectMAP Mode
(2)
(2)
Notes:
1
2
VCCINT VCCO
VCCINT VCCO
(2)
(2)
(2)
(2)
(2)
(4)
(4)
(4)
(4)
(4)
CS and WRITE must be either driven Low or pulled down externally. One option is shown.
For Mode pin connections and Done pullup value, refer to the appropriate FPGA data sheet.
External oscillator required for Virtex/Virtex-E SelectMAP or Virtex-II/Virtex-II Pro Slave-SelectMAP modes.
For compatible voltages, refer to the appropriate FPGA data sheet.
Notes:
1
2
3
4
(4)
(4)
(4)
1
2
the appropriate FPGA data sheet.
3
4 For compatible voltages, refer to the appropriate FPGA data sheet.
Notes:
(4)
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