參數(shù)資料
型號: 0W344-004-XTP
廠商: ON Semiconductor
文件頁數(shù): 34/43頁
文件大?。?/td> 0K
描述: DSP BELASIGNA 200 AUDIO 52-NQFN
產(chǎn)品變化通告: BelaSigna 200 QFN Obsolescence 09/Dec/2009
標準包裝: 500
系列: BelaSigna® 200
類型: 音頻處理器
應用: 便攜式設備
安裝類型: 表面貼裝
封裝/外殼: 52-TFQFN 裸露焊盤
供應商設備封裝: 52-NQFP(8x8)
包裝: 帶卷 (TR)
BelaSigna 200
3.0 BelaSigna 200 Design and Layout Strategies
BelaSigna 200 is designed to allow both digital and analog processing in a single system. Due to the mixed-signal nature of this
system, the design of the printed circuit board (PCB) layout is critical to maintain the high audio fidelity of BelaSigna 200. To avoid
coupling noise into the audio signal path, keep the digital traces away from the analog traces. To avoid electrical feedback coupling,
isolate the input traces from the output traces.
3.1 Recommended Ground Design Strategy
The ground plane should be partitioned into two: the analog ground plane (AGND) and the digital ground plane (DGND). These two
planes should be connected together at a single point, known as the star point. The star point should be located at the ground terminal
of a capacitor on the output of the power regulator as illustrated in Figure 2.
Figure 2: Schematic of Ground Scheme
The DGND plane is used as the ground return for digital circuits and should be placed under digital circuits.
The AGND plane should be kept as noise-free as possible. It is used as the ground return for analog circuits and it should surround
analog components and pins. It should not be connected to or placed under any noisy circuits such as RF chips, switching supplies or
Rev. 16 | Page 4 of 43 | www.onsemi.com
相關PDF資料
PDF描述
0W888-002-XTP DSP BELASIGNA 250 AUDIO 64LFBGA
3336-52 IC PLL INTEGER-N 3GHZ 48-QFN
5P49EE602NLGI IC CLOCK GENERATOR 24QFN
5P49EE801NDGI IC CLOCK GENERATOR 28QFN
74ABT16240ADGG,518 IC INVERTER QUAD 4-INPUT 48TSSOP
相關代理商/技術(shù)參數(shù)
參數(shù)描述
0W344-005-XTP 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC BELASIGNA 200 QFN 1000RL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
0W588-002-XUA 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC BELASIGNA 200 WLCSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
0W589-005-XDS 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC AUDIO AD/DA RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風格: 封裝 / 箱體: 封裝:
0W589-007-XDS 功能描述:音頻模/數(shù)轉(zhuǎn)換器 IC AUDIO AD/DA RoHS:否 制造商:Wolfson Microelectronics 轉(zhuǎn)換速率: 分辨率: ADC 輸入端數(shù)量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風格: 封裝 / 箱體: 封裝:
0W598001EVK 制造商:ON Semiconductor 功能描述:B250 EDK SGL PURCH - Bulk