參數(shù)資料
型號: 0W344-004-XTP
廠商: ON Semiconductor
文件頁數(shù): 21/43頁
文件大?。?/td> 0K
描述: DSP BELASIGNA 200 AUDIO 52-NQFN
產(chǎn)品變化通告: BelaSigna 200 QFN Obsolescence 09/Dec/2009
標準包裝: 500
系列: BelaSigna® 200
類型: 音頻處理器
應用: 便攜式設備
安裝類型: 表面貼裝
封裝/外殼: 52-TFQFN 裸露焊盤
供應商設備封裝: 52-NQFP(8x8)
包裝: 帶卷 (TR)
BelaSigna 200
10.0 Boot Sequence
BelaSigna 200 boots in a two-stage boot sequence. The ProgramROM begins loading the bootloader from an external SPI EEPROM
200ms after power is applied to the chip. In this process the ProgramROM checks the EEPROM file structure to ensure validity. If the
file structure is validated, the bootloader is written to PRAM. In case of an error while reading the external EEPROM, all outputs are
muted. The system will then reset due to a watchdog timeout.
Once the bootloader is loaded into PRAM the program counter is set to point to the beginning of the bootloader code. Subsequently,
the signal-processing application that is stored in the EEPROM is downloaded to PRAM by the bootloader. The boot process generally
takes less than one second. ON Semiconductor provides a standard full-featured bootloader.
An alternative to bootloading is often used in development - program code can be loaded through the debug port after powering
BelaSigna 200. In this case, an SPI EEPROM may or may not be attached, and the debug port takes over control of the system. Some
products use this technique when an EEPROM is not suitable to the application.
Rev. 16 | Page 28 of 43 | www.onsemi.com
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