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參數(shù)資料
| 型號： | μPD98408 |
| 廠商： | NEC Corp. |
| 英文描述： | ATM Physical Interface(ATM 物理接口) |
| 中文描述： | ATM物理接口（自動柜員機物理接口） |
| 文件頁數(shù)： | 11/32頁 |
| 文件大?。?/td> | 193K |
| 代理商： | ΜPD98408 |
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11
μ
PD98408
1.4 CPU Interface
Pin Name
Pin No.
I/O
Active
Level
Function
BUSMODE
141
I
Selects the CPU interface operation mode.
0:
<DS_B, RW_B, DTACK_B> style
(Motorola compatible)
1:
<RD_B, WR_B, RDY_B> style
(Intel compatible)
DATA0-
DATA7
125, 124, 122,
121, 119, 118,
116, 115
I/O
Used to transfer data between the CPU and an internal register
(8-bit). The MSB is DATA7.
ADDR0-
ADDR5
134, 133, 132,
129, 128, 127
I
Used to set the address of an internal register (6-bit).
SEL_ B
138
I
L
Register access enable signal. 0 for enable.
DS_B/RD_B
140
I
L/L
When BUSMODE = 0, becomes the data strobe signal (DS_B)
of the Motorola-compatible interface.
In read cycle:
DS_B = 0 for read data enable.
In write cycle:
DS_B = 0 for write data strobe.
When BUSMODE = 1, becomes the read instruction signal of
the Intel-compatible interface.
RD_B = 0 for read instruction.
RW_B/WR_B
139
I
L/L
When BUSMODE = 0, becomes the read/write control signal
(RW_B) of the Motorola-compatible interface.
0:
Write cycle
1:
Read cycle
When BUSMODE = 1, becomes the write instruction signal of
the Intel-compatible interface.
WR_B = 0 for write instruction.
DTACK_B/
RDY_B
137
O
L/L
When BUSMODE = 0, becomes the data acknowledge signal
(DTACK_B) of the Motorola-compatible interface.
This signal indicates the completion of data transmission over
the data bus. DTACK_B is set to 0 upon the completion of
data transmission.
When BUSMODE = 1, becomes the ready signal (RDY_B) of
the Intel-compatible interface.
This signal indicates the completion of data transmission over
the data bus. RDY_B is set to 0 upon the completion of data
transmission.
INT_B
136
O
L
Notifies the CPU of the occurrence of an interrupt factor.
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