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參數(shù)資料
| 型號： | μPD78P058FY |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8 Bit Single Chip Microcontrollers |
| 中文描述： | 8位單片機微控制器 |
| 文件頁數(shù)： | 33/74頁 |
| 文件大?。?/td> | 520K |
| 代理商： | ΜPD78P058FY |
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μ
PD78P058FY
33
Subsystem Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 2.7 to 6.0 V)
Resonator
Recommended
Circuit
Parameter
Test Conditions
MIN. TYP. MAX. Unit
Crystal resonator
Oscillation frequency
(f
XT
)
Note 1
32
32.768
35
kHz
Oscillation stabilization
time
Note 2
V
DD
= 4.5 to 6.0 V
1.2
2
s
10
External clock
XT1 input frequency
(f
XT
)
Note 1
32
100
kHz
XT1 input
high-/low-level
width (t
XTH
/t
XTL
)
5
15
μ
s
Notes
1.
Only the oscillator characteristics are shown. See the AC characteristics for instruction execution times.
2.
This is the time required for oscillation to stabilize after power (V
DD
) is turned on.
Cautions
1. When the subsystem clock oscillator is used, the following should be noted concerning wiring
in the area in the figure enclosed by broken lines to prevent the influence of wiring capacitance,
etc.
The wiring should be kept as short as possible.
No other signal lines should be crossed.
Keep away from lines carrying a high fluctuating current.
The oscillator capacitor grounding point should always be at the same potential as V
SS
.
Do not connect to a ground pattern carrying a high current.
A signal should not be taken from the oscillator.
2. The subsystem clock oscillator is a low-amplitude circuit in order to achieve a low consumption
current, and is more prone to misoperation due to noise than the main system clock oscillator.
Particular care is therefore required with the wiring method when the subsystem clock is used.
XT1
V
PP
XT2
C4
R1
C3
XT2
XT1
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