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參數(shù)資料
| 型號： | μPD784225Y |
| 廠商： | NEC Corp. |
| 英文描述： | 16 Bit Single Chip Microcontrollers(16 位單片微控制器) |
| 中文描述： | 16位單片機微控制器（16位單片微控制器） |
| 文件頁數(shù)： | 40/68頁 |
| 文件大?。?/td> | 278K |
| 代理商： | ΜPD784225Y |
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40
μ
PD784224Y, 784225Y
7.7.2 Clocked serial interface (CSI)
In this mode, the master device starts transfer by making the serial clock active and communicates 1-byte data
in synchronization with this clock.
(1) 3-wire serial I/O mode
This mode is to communicate with devices having the conventional clocked serial interface.
Basically, communication is established in this mode with three lines: one serial clock (SCK0) and two serial
data (SI0 and SO0) lines.
Generally, a handshake line is necessary to check the reception status.
Figure 7-12. Block Diagram in 3-Wise Serial I/O Mode
8
8
SI0
SO0
SCK0
INTCSI0
INTTM2
f
XX
/8
f
XX
/16
Internal bus
Direction control circuit
Interrupt
generation circuit
Selector
Serial clock
counter
Serial clock
control circuit
Serial I/O shift register 0
(SIO0)
(2) I
2
C (Inter IC) bus mode (supporting multi-master)
This mode is to communicate with devices conforming to the I
2
C bus format.
This mode is to transfer 8-bit data with two or more devices by using two lines: serial clock (SCL0) and serial
data bus (SDA0).
During transfer, a “start condition”, “data”, and “stop condition” can be output onto the serial data bus. During
reception, these data can be automatically detected by hardware.
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