參數(shù)資料
型號(hào): μPD784225Y
廠商: NEC Corp.
英文描述: 16 Bit Single Chip Microcontrollers(16 位單片微控制器)
中文描述: 16位單片機(jī)微控制器(16位單片微控制器)
文件頁(yè)數(shù): 13/68頁(yè)
文件大?。?/td> 278K
代理商: ΜPD784225Y
13
μ
PD784224Y, 784225Y
5.2 Pins Other Than Port Pins (1/2)
Pin Name
I/O
Alternate Function
Function
TI00
Input
P35
External count clock input to 16-bit timer register
TI01
P36
Capture trigger signal input to capture/compare register 00
TI1
P33
External count clock input to 8-bit timer register 1
TI2
P34
External count clock input to 8-bit timer register 2
TO0
Output
P30
16-bit timer output (shared by 14-bit PWM output)
TO1
P31
8-bit timer output (shared by 8-bit PWM output)
TO2
P32
RxD1
Input
P20/SI1
Serial data input (UART1)
RxD2
P70/SI2
Serial data input (UART2)
TxD1
Output
P21/SO1
Serial data output (UART1)
TxD2
P71/SO2
Serial data output (UART2)
ASCK1
Intput
P22/SCK1
Baud rate clock input (UART1)
ASCK2
P72/SCK2
Baud rate clock input (UART2)
SI0
Input
P25/SDA0
Serial data input (3-wire serial clock I/O0)
SI1
P20/RxD1
Serial data input (3-wire serial clock I/O1)
SI2
P70/RxD2
Serial data input (3-wire serial clock I/O2)
SO0
Output
P26
Serial data output (3-wire serial I/O0)
SO1
P21/TxD1
Serial data output (3-wire serial I/O1)
SO2
P71/TxD2
Serial data output (3-wire serial I/O2)
SDA0
I/O
P25/SI0
Serial data input/output (I
2
C bus)
SCK0
I/O
P27/SCL0
Serial clock input/output (3-wire serial I/O0)
SCK1
P22/ASCK1
Serial clock input/output (3-wire serial I/O1)
SCK2
P72/ASCK2
Serial clock input/output (3-wire serial I/O2)
SCL0
P27/SCK0
Serial clock input/output (I
2
C bus)
NMI
Input
P02/INTP2
Non-maskable interrupt request input
INTP0
P00
External interrupt request input
INTP1
P01
INTP2
P02/NMI
INTP3
P03
INTP4
P04
INTP5
P05
PCL
Output
P23
Clock output (for trimming main system clock and subsystem clock)
BUZ
Output
P24
Buzzer output
RTP0-RTP7
Output
P120-P127
Real-time output port that outputs data in synchronization with
trigger
AD0-AD7
I/O
P40-P47
Low-order address/data bus when external memory is connected
A8-A15
Output
P50-P57
Middle-order address bus when external memory is connected
A16-A19
P60-P63
High-order address bus when external memory is connected
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