
41
CHAPTER 1 GENERAL
1.7 List of Functions
Item
Part Number
m
PD784044
m
PD784046
m
PD78F4046
Number of basic instructions
(mnemonics)
113
General-purpose register
8 bits
¥
16 registers
¥
8 banks, or 16 bits
¥
8 registers
¥
8 banks (memory mapping)
Minimum instruction execution time
125 ns (at internal 16 MHz operation)
Internal
memory
ROM
32 KB
(mask ROM)
64 KB
(mask ROM)
64 KB
(flash memory)
RAM
1024 B
2048 B
Memory space
1 MB with program and data memories combined
I/O port
Total
65 lines
Input
17 lines
I/O
48 lines
Pins with ancially
functions
Note
Pin with pull-
up resistor
29 pins
Real-time output port
4 bits
¥
1
Timer/counter
Timer 0 (16 bits)
: Timer register
¥
1 Pulse output
Capture/Compare register
¥
4
Toggle output
Set/Reset output
Timer 1 (16 bits)
: Timer register
¥
1 Pulse output
Compare register
¥
2
Toggle output
Set/Reset output
Timer/counter 2 (16 bits) : Timer register
¥
1 Pulse output
Compare register
¥
1
Toggle output
PWM/PPG output
Timer/counter 3 (16 bits) : Timer register
¥
1 Pulse output
Compare register
¥
2
Toggle output
PWM/PPG output
A/D converter
10-bit resolution
¥
16 channels (AV
DD
= 4.5 to 5.5 V)
Serial interface
UART/IOE (3-wire serial I/O): 2 channels (with baud rate generator)
Watchdog timer
1 channel
Interrupt
Hardware source
27 (internal: 23, external: 8 (shared with internal: 4)
Software source
BRK instruction, BRKCS instruction, operand error
Non-maskable
Internal: 1, external : 1
Maskable
Internal: 22, external: 7 (shared with internal: 4)
4 priority levels
Three processing formats: vectored interrupt/macro service/context switching
Bus sizing
8 bits/16 bits external data bus width selectable
Standby
HALT/STOP/IDLE mode
Supply voltage
V
DD
= 4.5 to 5.5 V
Package
80-pin plastic QFP (14
¥
14 mm)
Note
The pins with ancillary functions are included in the I/O pins.