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24
LIST OF TABLES (2/3)
Table No.
Title
Page
10-14. Square Wave Output Range of 8-Bit Timer/Event Counter 80 (At f
X
= 5.0 MHz).....................................161
10-15. Square Wave Output Range of 8-Bit Timer/Event Counter 80 (At f
CC
= 4.0 MHz)...................................161
10-16. Square Wave Output Range of 8-Bit Timer/Event Counter 81 (At f
X
= 5.0 MHz).....................................162
10-17. Square Wave Output Range of 8-Bit Timer/Event Counter 81 (At f
CC
= 4.0 MHz)...................................162
10-18. Square Wave Output Range of 8-Bit Timer Counter 82 (At f
X
= 5.0 MHz)...............................................162
10-19. Square Wave Output Range of 8-Bit Timer Counter 82 (At f
CC
= 4.0 MHz).............................................162
11-1.
11-2.
11-3.
Interval Generated Using the Interval Timer............................................................................................170
Watch Timer Configuration ......................................................................................................................170
Interval Generated Using the Interval Timer............................................................................................172
12-1.
12-2.
12-3.
12-4.
12-5.
Inadvertent Loop Detection Time of Watchdog Timer..............................................................................175
Interval Time ............................................................................................................................................175
Configuration of Watchdog Timer ............................................................................................................176
Inadvertent Loop Detection Time of Watchdog Timer..............................................................................179
Interval Time of Interval Timer .................................................................................................................180
13-1.
Configuration of A/D Converter................................................................................................................181
14-1.
14-2.
14-3.
14-4.
Configuration of Serial Interface 20 .........................................................................................................196
Serial Interface 20 Operating Mode Settings...........................................................................................202
Example of Relationships between System Clock and Baud Rate..........................................................205
Relationships between ASCK20 Pin Input Frequency and Baud Rate
(When BRGC20 is Set to 80H) ................................................................................................................206
Example of Relationships between System Clock and Baud Rate..........................................................214
Relationships between ASCK20 Pin Input Frequency and Baud Rate
(When BRGC20 is Set to 80H) ................................................................................................................215
Receive Error Causes..............................................................................................................................220
14-5.
14-6.
14-7.
15-1.
15-2.
15-3.
15-4.
15-5.
Configuration of SMB0.............................................................................................................................235
INTSMB0 Generation Timing and Wait Control .......................................................................................277
Extension Code Bit Definition ..................................................................................................................278
Status at Arbitration and Interrupt Request Generation Timing...............................................................280
Wait Time.................................................................................................................................................281
18-1.
18-2.
18-3.
Interrupt Sources .....................................................................................................................................304
Interrupt Request Signals and Corresponding Flags...............................................................................306
Time from Generation of Maskable Interrupt Request to Processing ......................................................315