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19
CHAPTER 1 GENERAL
Table 1-7. Functional Outline of
μ
PD78083 Subseries
Item
Part Number
Mask ROM
PROM
8K bytes
16K bytes
24K bytes
Note 1
256 bytes
384 bytes
512 bytes
Note 1
64K bytes
8 bits
×
8
×
4 banks
0.4
μ
s/0.8
μ
s/1.6
μ
s/3.2
μ
s/6.4
μ
s/12.8
μ
s
(with main system clock of 5.0 MHz)
16-bit operation
Multiplication/division (8 bits
×
8 bits, 16 bits
÷
8 bits)
Bit manipulation (set, reset, test, Boolean operation)
BCD adjustment, etc.
Total
CMOS input: 1
CMOS I/O
: 33
: 32
8-bit resolution
×
8 channels
3-wire serial I/O/UART mode selectable: 1 channel
8-bit timer/event counter : 2 channels
Watchdog timer
: 1 channel
2 (8-bit PWM output)
19.5 kHz, 39.1 kHz, 78.1 kHz, 156 kHz, 313 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5.0 MHz
(with main system clock of 5.0 MHz)
1.2 kHz, 2.4 kHz, 4.9 kHz, 9.8 kHz (with main system clock of 5.0 MHz)
Internal: 8, external: 3
Internal: 1
1
V
DD
= 1.8 to 5.5 V
Note 2
42-pin plastic shrink DIP (600 mil)
42-pin ceramic shrink DIP (with window) (600 mil) (
μ
PD78P083 only)
44-pin plastic QFP (10
×
10 mm)
Notes 1.
The capacities of the internal PROM and internal-high-speed RAM can be changed by using a memory
size select register. (IMS)
2.
The supply voltage (V
DD
) of the
μ
PD78081(A2) is 4.5 to 5.5 V.
Internal
memory
μ
PD78081
μ
PD78082
μ
PD78P083
ROM
High-speed RAM
Memory space
General-purpose register
Minimum instruction
execution time
Instruction set
I/O port
A/D converter
Serial interface
Timer
Timer output
Clock output
Buzzer output
Vectored
Maskable
interrupt
Non-maskable
source
Software
Supply voltage
Package