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CHAPTER 16 SERIAL INTERFACE CHANNEL 0 (
μ
PD78018FY SUBSERIES)
(b) 9-clock wait
(3) Register setting
The I
2
C bus mode is set by using the serial operation mode register 0 (CSIM0), serial bus interface control
register (SBIC), and interrupt timing specification register (SINT).
(a) Serial operation mode register 0 (CSIM0)
CSIM0 is set by using a 1-bit or 8-bit memory manipulation instruction.
This register is set to 00H when the RESET signal is input.
(Cont’d)
Notes 1.
Bit 6 (COI) is read-only.
2.
The clock frequency is 1/16 of the frequency output by TO2 in the I
2
C bus mode.
3.
This pin can be used freely as a port pin.
Remark
×
PM
××
: Port mode register
P
××
: Output latch of port
: Don’t care
SCL
SDA0 (SDA1)
D1
D0
D7
D6
D5
SCL of master
6
7
8
9
1
2
3
D2
SCL of slave
Master makes SCL Hi-Z; slave makes it low.
Output according to value set to ACKE in advance
ACK
4
3
2
Symbol
1
0
FF60H
CSIM
00
CSIM0
CSIM
01
CSIM
03
CSIM
02
CSIM
04
WUP
COI
CSIE0
Address
On reset
R/W
00H
R/W
Note 1
<7>
<6>
<5>
CSIM01
0
1
Selects clock of serial interface channel 0
External clock input to SCK0/SCL pin
Output of 8-bit timer register 2 (TM2)
Note 2
0
R/W
1
Clock specified by bits 0-3 of timer clock select register 3 (TCL3)
CSIM
04
0
CSIM00
×
0
1
R/W
CSIM
03
CSIM
02
PM25 P25 PM26 P26 PM27 P27
Operation
mode
First bit
SCK0/SCL/P27
pin function
×
MSB
Note 3
0
0
0
1
2-wire serial
I/O mode
or I
2
C bus
mode
P25
(CMOS I/O)
SB1/SDA1
(N-ch open-
drain I/O)
SCK0/SCK
(N-ch open-
drain I/O)
3-wire serial I/O mode (Refer to
16.4.2 Operation in 3-wire serial I/O mode
.)
1
1
Note 3
1
Note 3
0
0
0
1
P26
(CMOS I/O)
SB0/SDA0
(N-ch open-
drain I/O)
Note 3
SO0/SB1/SDA1/P26
pin function
SI0/SB0/SDA0/P25
pin function