482
CHAPTER 24 INSTRUCTION SET
Clock
Flag
Note 1
Note 2
Z AC CY
ADDC
A, #byte
2
8
–
A, CY
←
A + byte + CY
×
×
×
saddr, #byte
3
12
16
(saddr), CY
←
(saddr) + byte + CY
×
×
×
A, r
Note 3
2
8
–
A, CY
←
A + r + CY
×
×
×
r, A
2
8
–
r, CY
←
r + A + CY
×
×
×
A, saddr
2
8
10
A, CY
←
A + (saddr) + CY
×
×
×
A, !addr16
3
16
18 + 2n A, CY
←
A + (addr16) + CY
×
×
×
A, [HL]
1
8
10 + 2n A, CY
←
A + (HL) + CY
×
×
×
A, [HL + byte]
2
16
18 + 2n A, CY
←
A + (HL + byte) + CY
×
×
×
A, [HL + B]
2
16
18 + 2n A, CY
←
A + (HL + B) + CY
×
×
×
A, [HL + C]
2
16
18 + 2n A, CY
←
A + (HL + C) + CY
×
×
×
SUB
A, #byte
2
8
–
A, CY
←
A – byte
×
×
×
saddr, #byte
3
12
16
(saddr), CY
←
(saddr) – byte
×
×
×
A, r
Note 3
2
8
–
A, CY
←
A – r
×
×
×
r, A
2
8
–
r, CY
←
r – A
×
×
×
A, saddr
2
8
10
A, CY
←
A – (saddr)
×
×
×
A, !addr16
3
16
18 + 2n A, CY
←
A – (addr16)
×
×
×
A, [HL]
1
8
10 + 2n A, CY
←
A – (HL)
×
×
×
A, [HL + byte]
2
16
18 + 2n A, CY
←
A – (HL + byte)
×
×
×
A, [HL + B]
2
16
18 + 2n A, CY
←
A – (HL + B)
×
×
×
A, [HL + C]
2
16
18 + 2n A, CY
←
A – (HL + C)
×
×
×
SUBC
A, #byte
2
8
–
A, CY
←
A – byte – CY
×
×
×
saddr, #byte
3
12
16
(saddr), CY
←
(saddr) – byte – CY
×
×
×
A, r
Note 3
2
8
–
A, CY
←
A – r – CY
×
×
×
r, A
2
8
–
r, CY
←
r – A – CY
×
×
×
A, saddr
2
8
10
A, CY
←
A – (saddr) – CY
×
×
×
A, !addr16
3
16
18 + 2n A, CY
←
A – (addr16) – CY
×
×
×
A, [HL]
1
8
10 + 2n A, CY
←
A – (HL) – CY
×
×
×
A, [HL + byte]
2
16
18 + 2n A, CY
←
A – (HL + byte) – CY
×
×
×
A, [HL + B]
2
16
18 + 2n A, CY
←
A – (HL + B) – CY
×
×
×
A, [HL + C]
2
16
18 + 2n A, CY
←
A – (HL + C) – CY
×
×
×
Notes 1.
When the internal high-speed RAM area is accessed or when an instruction that does not access data
is executed
2.
When an area other than the internal high-speed RAM area is accessed
3.
Except r = A
Remarks 1.
One clock of an instruction is equal to one CPU clock (f
CPU
) selected by processor clock control
register (PCC).
2.
The number of clocks shown is when the program is stored in the internal ROM area.
3.
n indicates the number of wait states when the external memory extension area is read.
Mnemonic
Operand
Byte
Operation
8-bit
operation
Instruction
Group