參數(shù)資料
型號： μPD75F4246(A)
廠商： NEC Corp.
元件分類： 8位微控制器
英文描述： 8 Bit Single Chip Microcontrollers
中文描述： 8位單片機微控制器
文件頁數(shù)： 19/143頁
文件大小： 549K
代理商： ΜPD75F4246(A)
7
CHAPTER 2 BASIC FORMAT
2.3 Ways to Switch to Power On/Write Mode
To erase and write to the
μ
PD75F4264, you must set the flash writer to the correct mode for writing to the
μ
PD75F4264. You must also select the communication method to be used by the flash writer (for details, see
Table
2-1 Selection of Communication Method for Write Operation
). Select the communication method immediately
after turning on the power to the
μ
PD75F4264. For details, see
2.3.1 Switching to power on/write mode
below.
2.3.1 Switching to power on/write mode
Applying 10-V voltage to the
μ
PD75F4264’s V
PP
pin switches the
μ
PD75F4264 from normal operation mode to flash
memory write mode.
The power-on sequence is described below.
(1) Apply power to the V
DD
pin after the
μ
PD75F4264’s RESET pin is connected to a GND potential.
(2) Apply 10-V voltage to the
μ
PD75F4264’s V
PP
pin.
(3) Connect the
μ
PD75F4264’s RESET pin to a V
DD
potential (to clear reset).
(4) Send a pulse to the
μ
PD75F4264’s V
PP
pin to select the write communication method.
(5) Maintain application of 10-V voltage to the
μ
PD75F4264’s V
PP
pin.
Supplying the CPU clock from the flash writer is supported. To use this option, do not supply the CPU clock until
after the rise of the V
DD
signal.
The following is a timing chart of the switch to power on/write mode. For detailed specifications, see
CHAPTER
6
μ
PD75F4264 PROGRAMMING CHARACTERISTICS (PRELIMINARY)
.
Figure 2-2. Timing of Switch to Power On/Write Mode
Note
Detects the falling edge of the V
PP
pulse.
V
PP
V
DD
GND
V
PP
V
DD
GND
V
DD
V
DD
GND
P80 (CPU clock)
V
DD
GND
RESET
(1) 2 ms
(2) 2 ms
(3) 10 ms
(4) 30 s
(5)
30 s
Note
×
Maximum of 15 V
PP
pulses
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