
18
LIST OF FIGURES (4/5)
Fig. No.
Title
Page
11-1
11-2
11-3
11-4
11-5
11-6
11-7
11-8
11-9
11-10
Block Diagram of A/D Converter............................................................................................................
Format of A/D Converter Mode Register (ADM) ....................................................................................
Format of Analog Input Channel Specification Register (ADS) .............................................................
Basic Operation of A/D Converter..........................................................................................................
Relation between Analog Input Voltage and A/D Conversion Result ....................................................
A/D Conversion by Hardware Start (with falling edge specified) ...........................................................
A/D Conversion by Software Start .........................................................................................................
Processing of Analog Input Pin..............................................................................................................
A/D Conversion End Interrupt Generation Timing .................................................................................
Processing of AVDD Pin........................................................................................................................
302
305
307
309
310
312
313
315
316
316
12-1
12-2
12-3
12-4
Format of DMA Peripheral I/O Address Registers 0 to 2 (DIOA0 to DIOA2) .........................................
Format of DMA On-chip RAM Address Registers 0 to 2 (DRA0 to DRA2) ............................................
Format of DMA Byte Count Registers 0 to 2 (DBC0 to DBC2) ..............................................................
Format of DMA Channel Control Registers 0 to 2 (DCHC0 to DCHC2).................................................
317
318
318
319
13-1
13-2
13-3
13-4
13-5
Block Diagram of RTO...........................................................................................................................
Configuration of Real-Time Output Buffer Registers .............................................................................
Format of Real-Time Output Port Mode Register (RTPM).....................................................................
Format of Real-Time Output Port Control Register (RTPC)...................................................................
Example of Operation Timing of RTO (when EXTR = 0, BYTE = 0)......................................................
321
322
324
325
326
14-1
14-2
14-3
14-4
14-5
14-6
14-7
14-8
14-9
14-10
14-11
14-12
14-13
14-14
14-15
14-16
14-17
14-18
14-19
14-20
14-21
14-22
Format of Port 0 (P0) .............................................................................................................................
Format of Port 0 Mode Register (PM0)..................................................................................................
Format of Pull-up Resistance Option Register 0 (PU0) .........................................................................
Format of Rising Edge Enable Register (EGP0)....................................................................................
Format of Falling Edge Enable Register (EGN0)...................................................................................
Format of Port 1 (P1) .............................................................................................................................
Format of Port 1 Mode Register (PM1)..................................................................................................
Format of Pull-up Resistance Option Register 1 (PU1) .........................................................................
Format of Port 1 Function Register (PF1)..............................................................................................
Format of Port 2 (P2) .............................................................................................................................
Format of Port 2 Mode Register (PM2)..................................................................................................
Format of Pull-up Resistance Option Register 2 (PU2) .........................................................................
Format of Port 2 Function Register (PF2)..............................................................................................
Format of Port 3 (P3) .............................................................................................................................
Format of Port 3 Mode Register (PM3)..................................................................................................
Format of Pull-up Resistance Option Register 3 (PU3) .........................................................................
Format of Ports 4 and 5 (P4 and P5).....................................................................................................
Format of Port 4 Mode Register, Port 5 Mode Register (PM4, PM5).....................................................
Format of Port 6 (P6) .............................................................................................................................
Format of Port 6 Mode Register (PM6)..................................................................................................
Format of Ports 7 and 8 (P7 and P8).....................................................................................................
Format of Port 9 (P9) .............................................................................................................................
329
331
331
332
332
333
334
335
335
336
337
338
338
339
340
341
341
343
343
344
345
346