參數(shù)資料
型號: μPD4564323
廠商: NEC Corp.
英文描述: 64M-bit Synchronous DRAM(64M 同步動態(tài)RAM)
中文描述: 6400位同步DRAM(6400同步動態(tài)RAM)的
文件頁數(shù): 33/82頁
文件大小: 659K
代理商: ΜPD4564323
33
μ
PD4564323
Preliminary Data Sheet
DC Characteristics 1 (Recommended Operating Conditions unless otherwise noted)
Parameter
Symbol
Test conditions
/CAS
latency
Grade
Maximum
Unit
Notes
Operating current
I
CC1
Burst length
=
1
CL=2
-A80
170
t
RC
t
RC(MIN.)
-A10
150
I
O
= 0
mA,
-A10B
150
One bank active
CL=3
-A80
180
-A10
160
-A10B
160
mA
1
Precharge standby current
I
CC2
P
CKE
V
IL(MAX.)
, t
CK
=
15
ns
1
in power down mode
I
CC2
PS
CKE
V
IL(MAX.)
, t
CK
=
CKE
V
IH(MIN.)
, t
CK
=
15
ns
CS
V
IH(MIN.)
,
Input signals are changed one time during 30
ns.
CKE
V
IH(MIN.)
, t
CK
=
Input signals are stable.
0.5
mA
Precharge standby current
in non power down mode
I
CC2
N
20
mA
I
CC2
NS
6
Active standby current in
I
CC3
P
CKE
V
IL(MAX.)
, t
CK
=
15
ns
5
power down mode
I
CC3
PS
CKE
V
IL(MAX.)
, t
CK
=
CKE
V
IH(MIN.)
, t
CK
=
15
ns
/CS
V
IH(MIN.)
Input signals are changed one time during 30
ns.
I
CC3
NS CKE
V
IH(MIN.)
, t
CK
=
Input signals are stable.
4
mA
Active standby current in
non power down mode
I
CC3
N
30
20
mA
Operating current
I
CC4
t
CK
t
CK(MIN.)
CL=2
-A80
180
(Burst mode)
I
O
= 0
mA,
-A10
160
All banks active
-A10B
140
CL=3
-A80
230
-A10
200
-A10B
200
mA
2
Refresh current
I
CC5
t
RC
t
RC(MIN.)
CL=2
-A80
200
mA
3
-A10
200
-A10B
170
CL=3
-A80
205
-A10
205
-A10B
175
Self refresh current
I
CC6
CKE
0.2
V
-**
1
mA
-**L
0.4
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
2
. I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
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