參數資料
型號: μPD42S65165
廠商: NEC Corp.
英文描述: 64 M-Bit Dynamic Ram(64M 動態(tài)存儲器)
中文描述: 64 m位動態(tài)隨機存儲器(6400動態(tài)存儲器)
文件頁數: 5/48頁
文件大小: 535K
代理商: ΜPD42S65165
μ
PD42S65165, 4265165
5
Input/Output Pin Functions
The
μ
PD42S65165, 4265165 have input pins RAS, UCAS, LCAS, WE, OE, A0 to A11 and input/output pins
I/O1 to I/O16.
Pin name
RAS
(Row address strobe)
UCAS, LCAS
(Upper, Lower column
address strobe)
A0 to A11
(Address inputs)
WE
(Write enable)
OE
(Output enable)
I/O1 to I/O16
(Data inputs/outputs)
Input/Output
Function
Input
RAS activates the sense amplifier by latching a row address and selecting a
corresponding word line.
It refreshes memory cell array of one line selected by the row address.
It also selects the following function.
CAS before RAS self refresh, CAS before RAS refresh
Input
UCAS, LCAS activates data input/output circuit by latching column address
and selecting a digit line connected with the sense amplifier.
Input
Address bus.
Input total 22-bit of address signal, upper 12-bit and lower 10-bit in sequence
(address multiplex method).
Therefore, one word is selected from 4,194,304-word by 16-bit memory cell
array.
In actual operation, latch row address by specifying row address and
activating RAS.
Then, switch the address bus to column address and activate CAS.
Each address is taken into the device when RAS and CAS are activated.
Therefore, the address input setup time (t
ASR
, t
ASC
) and hold time (t
RAH
, t
CAH
)
are specified for the activation of RAS and CAS.
Input
Write control signal.
Write operation is executed by activating RAS, CAS and WE.
Input
Read control signal.
Read operation can be executed by activating RAS, CAS and OE.
If WE is activated during read operation, OE is to be ineffective in the
device.
Therefore, read operation cannot be executed.
Input/Output
16-bit data bus.
I/O1 to I/O16 are used to input/output data.
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