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參數(shù)資料
| 型號： | μPD42S17805 |
| 廠商： | NEC Corp. |
| 英文描述： | 16M- bit CMOS dynamic RAMs(16M CMOS 動態(tài)RAM) |
| 中文描述： | 1,600位CMOS動態(tài)存儲器（1,600的CMOS動態(tài)內(nèi)存） |
| 文件頁數(shù)： | 14/40頁 |
| 文件大?。?/td> | 338K |
| 代理商： | ΜPD42S17805 |
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μ
PD42S17805, 4217805
14
Hyper Page Mode (EDO)
Parameter
Symbol
t
RAC
= 50 ns
t
RAC
= 60 ns
t
RAC
= 70 ns
Unit Notes
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read / Write cycle time
t
HPC
20
–
25
–
30
–
ns
1
RAS pulse width
t
RASP
50
125,000
60
125,000
70
125,000
ns
CAS pulse width
t
HCAS
8
10,000
10
10,000
12
10,000
ns
CAS precharge time
t
CP
8
–
10
–
10
–
ns
Access time from CAS precharge
t
ACP
–
30
–
35
–
40
ns
CAS precharge to WE delay time
t
CPWD
41
–
52
–
59
–
ns
2
RAS hold time from CAS precharge
t
RHCP
30
–
35
–
40
–
ns
Read modify write cycle time
t
HPRWC
52
–
66
–
75
–
ns
Data output hold time
t
DHC
5
–
5
–
5
–
ns
OE to CAS hold time
t
OCH
5
–
5
–
5
–
ns
3
OE precharge time
t
OEP
5
–
5
–
5
–
ns
Output buffer turn-off delay from WE
t
WEZ
0
10
0
13
0
15
ns
4,5
WE pulse width
t
WPZ
8
–
10
–
10
–
ns
5
Output buffer turn-off delay from RAS
t
OFR
0
10
0
13
0
15
ns
4,5
Output buffer turn-off delay from CAS
t
OFC
0
10
0
13
0
15
ns
4,5
Notes 1.
t
HPC (MIN.)
is applied to CAS access.
2.
If t
WCS
≥
t
WCS (MIN.)
, the cycle is an early write cycle and the data out will remain Hi-Z through the entire
cycle. If t
RWD
≥
t
RWD (MIN.)
, t
CWD
≥
t
CWD (MIN.)
, t
AWD
≥
t
AWD (MIN.)
and t
CPWD
≥
t
CPWD (MIN.)
, the cycle is a read modify
write cycle and the data out will contain data read from the selected cell. If neither of the above conditions
is met, the state of the data out is indeterminate.
3.
WE: inactive (in read cycle)
CAS: inactive, OE: active ······ t
CHO
is effective.
CAS, OE: active ······ t
OCH
is effective.
4.
t
OFC (MAX.)
, t
OFR (MAX.)
and t
WEZ (MAX.)
define the time when the output achieves the conditions of Hi-Z and is
not referenced to V
OH
or V
OL
.
5.
To make I/Os to Hi-Z in read cycle, it is necessary to control RAS, CAS, WE, OE as follows. The effective
specification depends on state of each signal.
(1)
Both RAS and CAS are inactive (at the end of the read cycle)
WE: inactive, OE: active
t
OFC
is effective when RAS is inactivated before CAS is inactivated.
t
OFR
is effective when CAS is inactivated before RAS is inactivated.
The slower of t
OFC
and t
OFR
becomes effective.
(2)
Both RAS and CAS are active or either RAS or CAS is active (in read cycle)
WE, OE: inactive ······ t
OEZ
is effective.
Both RAS and CAS are inactive or RAS is active and CAS is inactive (at the end of read cycle)
WE, OE: active and either t
RRH
or t
RCH
must be met ······ t
WEZ
and t
WPZ
are effective.
The faster of t
OEZ
and t
WEZ
becomes effective.
The faster of (1) and (2) becomes effective.
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