參數(shù)資料
型號(hào): ZR36011PQC
英文描述: Peripheral IC
中文描述: 外圍芯片
文件頁數(shù): 11/16頁
文件大?。?/td> 228K
代理商: ZR36011PQC
ZR36011
11
PRELIMINARY
CHS determines the validity of input data and synchronizes the half-clock-rate data transitions on the Y, CR pins, and the multiplexing
of Cb and Cr. As shown in Figure 20 for forward conversion, and Figure 21 for inverse conversion, the second rising edge of CLK
following the rising edge of CHS latches the first valid input data sample.
Data Input:
Y
Y
Y0
Cb0
CR
Y1
Cr1
Y2
Cb2
Figure 19. Illustration of Interpolation, MODE = 111
Y (N)
Cb (N)
Y (N)
Cb (N)
Interpolator Output:
Y3
Cr3
CR
Y (N+1)
Cr (N+1)
Y (N+1)
Cr (N+1)
Y (N+2)
Cb (N+2)
Y(N)
Cb(N)
Cr(N+1)+Cr(N-1)
2
Y0
Cb0
Y0+Y1
2
Cr-1+Cr1
2
Y1
Cr1
Y1+Y2
2
Cb0+Cb2
2
Y2
Cb2
Y2+Y3
2
Cr1+Cr3
2
Y3
Cr3
Y (N+2)
Cb (N+2)
Y(N)+Y(N+1)
2
Cr(N+1)+Cr(N-1)
2
Cb(N)
Y(N+1)
Cb(N)+Cb(N+2)
2
Cr(N+1)
Y(N+1)+Y(N+2)
2
Cr(N+1)
Cb(N)+Cb(N+2)
2
Y(N+2)
Cr(N+3)+Cr(N+1)
2
Cb(N+2)
Y(N+2)+Y(N+3)
2
Cr(N+3)+Cr(N+1)
2
Cb(N+2)
Cb2+Cb4
2
CLK
Y, CR
(Output)
R, G, B
(Input)
Figure 20. RGB to YCbCr Timing, MODE = 111
RGB
(0)
Y(0), Cb (0)
CHS
RGB
(1)
RGB
(8)
RGB
(9)
RGB
(10)
RGB
(11)
RGB
(12)
RGB
(13)
Y(2), Cr (2)
Y(4), Cb (4)
CLK
R, G, B
(Output)
Y, CR
(Input)
Figure 21. YCbCr to RGB timing, MODE = 111
RGB
(0)
Y(0), Cb (0)
CHS
RGB
(1)
RGB
(2)
RGB
(3)
RGB
(4)
RGB
(5)
Y(2), Cr (2)
Y(8), Cb (8)
Y(10), Cr (10)
Y(12), Cb (12)
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