REV. 1.0.1 D14 A24 AF14 STS1TXA_C1J1_0RX DS3LINECLK_0 STS1TXA_C1J1_nRX DS3LINECLK_n" />
參數(shù)資料
型號(hào): XRT94L31IB
廠商: Exar Corporation
文件頁數(shù): 66/133頁
文件大小: 0K
描述: IC MAPPER DS3/E3/STS-1 504TBGA
標(biāo)準(zhǔn)包裝: 24
應(yīng)用: 網(wǎng)絡(luò)切換
接口: 總線
電源電壓: 3.14 V ~ 3.47 V
封裝/外殼: 504-LBGA
供應(yīng)商設(shè)備封裝: 504-TBGA(35x35)
包裝: 托盤
安裝類型: 表面貼裝
XRT94L31
38
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
REV. 1.0.1
D14
A24
AF14
STS1TXA_C1J1_0RX
DS3LINECLK_0
STS1TXA_C1J1_nRX
DS3LINECLK_n
STS1TXA_C1J1_nRX
DS3LINECLK_n
I
TTL
STS-1 Transmit Telecom Bus C1/J1 Byte Phase Indicator Input Sig-
nal/Receive DS3/E3/STS-1 Clock Input from LIU (Channel n) (n=0, 1,
2):
The function of this pin depends upon whether or not the STS-1 Telecom
Bus Interface for Channel n has been enabled.
If STS-1 Telecom Bus (Channel n) has been enabled - Transmit STS-
1 Telecom Bus Interface - C1/J1 Byte Phase Indicator Input Signal
(Channel n):
This input pin should be pulsed "High" during both of the following condi-
tions.
Coincident to whenever the C1/J0 byte (within the incoming STS-1/STS-
3/STM-1 signal) is being input to the Transmit STS-1 Telecom Bus Inter-
face - Data Bus Input pins (TXA_D_n[7:0]).
Coincident to whenever the J1 byte(s) (within the incoming STS-1/STS-
3/STM-1 signal) is being input to the Transmit STS-1 Telecom Bus Inter-
face - Data Bus Input pins (TXA_D_n[7:0]).
This input pin should be held "Low" at all other times.
If STS-1 Telecom Bus (Channel n) has NOT been enabled -
RXDS3LINECLK_n (Receive DS3/E3/STS-1 clock input from LIU)
The DS3/E3 Framer block and/or the Receive STS-1 TOH Processor
block (associated with Channel n) use this input pin to sample and latch
the data that is present on the RxDS3POS_n and RxDS3NEG_n (for
Dual-Rail Operation only) inputs. This input clock signal also functions
as the timing source for the Ingress Direction signal and circuitry within
the DS3/E3 Framer block of Channel n.
The user is expected to connect this input to the Recovered Clock Out-
put of an off-chip DS3/E3/STS-1 LIU IC.
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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