
XRT86VL38
138
REV. V1.2.1
OCTAL T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION
2
CRCLOCK_INT
RUR/
WC
0
Change in CRC Multiframe Alignment In-Frame Interrupt Status
This bit indicates whether or not the E1 Receive Framer block has
lost or gained CRC Multiframe Alignment since the last read of this
register.
If this interrupt is enabled, then the Receive E1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive E1 Framer block declares CRC
Multiframe Alignment LOCK.
2.
Whenever the Receive E1 Framer block declares Loss of
CRC Multiframe Alignment.
0 = Indicates that the “Change in CRC Multiframe Alignment In-
Frame” interrupt has not occurred since the last read of this register.
1 = Indicates that the “Change in CRC Multiframe Alignment In-
Frame” interrupt has occurred since the last read of this register.
1
CASLOCK_INT
RUR/
WC
0
Change in CAS Multiframe Alignment In-Frame Interrupt Status
This bit indicates whether or not the E1 Receive Framer block has
lost or gained CAS Multiframe Alignments since the last read of this
register.
If this interrupt is enabled, then the Receive E1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive E1 Framer block declares CAS
Multiframe Alignment LOCK.
2.
Whenever the Receive E1 Framer block declares Loss of
CAS Multiframe Alignment.
0 = Indicates that the “Change in CAS Multiframe Alignment In-
Frame” interrupt has not occurred since the last read of this register.
1 = Indicates that the “Change in CAS Multiframe Alignment In-
Frame” interrupt has occurred since the last read of this register.
0
AIS16_INT
RUR/
WC
0
Change in AIS16 Alarm Condition Interrupt Status
This bit indicates whether or not the “Change in AIS16 Alarm Condi-
tion” interrupt has occurred since the last read of this register.
If this interrupt is enabled, then the Receive E1 Framer block will
generate an interrupt in response to either one of the following
conditions.
1.
Whenever the Receive E1 Framer block declares AIS16
(TimeSlot 16 = All Ones) condition.
2.
Whenever the Receive E1 Framer block clears AIS16
(TimeSlot 16 = All Ones) condition.
0 = Indicates that the “Change in AIS16 Condition” interrupt has not
occurred since the last read of this register.
1 = Indicates that the “Change in AIS16 Condition” interrupt has
occurred since the last read of this register.
T
ABLE
113: R
X
LOS/CRC I
NTERRUPT
S
TATUS
R
EGISTER
(RLCISR) H
EX
A
DDRESS
: 0
XN
B12
B
IT
F
UNCTION
T
YPE
D
EFAULT
D
ESCRIPTION
-O
PERATION