參數(shù)資料
型號(hào)： XRT86VL30IV80-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 143/175頁(yè)
文件大小： 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 80LQFP
標(biāo)準(zhǔn)包裝： 90
控制器類(lèi)型： T1/E1/J1 調(diào)幀器，LIU
電源電壓： 3.3V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（12x12）
包裝： 托盤(pán)
其它名稱(chēng)： 1016-1486
XRT86VL30IV80-F-ND
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XRT86VL30
IV
REV. 1.0.0
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
Table 59:: SSM Receive FDL Match 1 Register (RFDLMR1 0x0172h) ........................................................................... 76
Table 60:: SSM Receive FDL Match 2 Register (RFDLMR2 0x0173h) ........................................................................... 76
Table 61:: SSM Receive FDL Match 3 Register (RFDLMR3 0x0174h) ........................................................................... 76
Table 62:: SSM Transmit FDL Register (TFDLR 0x0175h) ............................................................................................. 77
Table 63:: SSM Transmit Byte Count Register (TBCR 0x0176h) .................................................................................... 77
Table 64:: Device ID Register (DEVID)
Hex Address: 0x01FE ........... 78
Table 65:: Revision ID Register (REVID)
Hex Address: 0x01FF ........... 78
Table 66:: Transmit Channel Control Register 0-23 (TCCR 0-23)
Hex Address: 0x0300 to 0x0317 .................... 79
Table 67:: Transmit User Code Register 0-23 (TUCR 0-23)
Hex Address: 0x0320 to 0x0337 ................ 81
Table 68:: Transmit Signaling Control Register 0-23 (TSCR 0-23)
Hex Address: 0x0340 to 0x0357 ....................... 82
Table 69:: Receive Channel Control Register 0-23 (RCCR 0-23)
Hex Address: 0x0360 to 0x0377 ................... 84
Table 70:: Receive User Code Register 0-23 (RUCR 0-23)
Hex Address: 0x0380 to 0x0397 .............. 86
Table 71:: Receive Signaling Control Register 0-23 (RSCR 0-23)
Hex Address: 0x03A0 to 0x03B7 .................... 87
Table 72:: Receive Substitution Signaling Register 0-23 (RSSR 0-23)
Hex Address: 0x03C0 to 0x03D7 ................... 89
Table 73:: Receive Signaling Array Register 0 to 23 (RSAR 0-23)
Hex Address: 0x0500 to 0x0517 ................... 90
Table 74:: LAPD Buffer 0 Control Register (LAPDBCR0)
Hex Address: 0x0600 .................................... 91
Table 75:: LAPD Buffer 1 Control Register (LAPDBCR1)
Hex Address: 0x0700 ...................................... 91
Table 76:: PMON Receive Line Code Violation Counter MSB (RLCVCU)
Hex Address: 0x0900 ................. 92
Table 77:: PMON Receive Line Code Violation Counter LSB (RLCVCL)
Hex Address: 0x0901 ................ 92
Table 78:: PMON Receive Framing Alignment Bit Error Counter MSB (RFAECU) Hex Address: 0x0902 ................... 93
Table 79:: PMON Receive Framing Alignment Bit Error Counter LSB (RFAECL)
Hex Address: 0x0903 .................... 93
Table 80:: PMON Receive Severely Errored Frame Counter (RSEFC)
Hex Address: 0x0904 ................... 94
Table 81:: PMON Receive CRC-6 BIT Error Counter - MSB (RSBBECU)
Hex Address: 0x0905 ................. 95
Table 82:: PMON Receive CRC-6 Bit Error Counter - LSB (RSBBECL)
Hex Address: 0x0906 ................ 95
Table 83:: PMON Receive Slip Counter (RSC)
Hex Address: 0x0909 ............... 96
Table 84:: PMON Receive Loss of Frame Counter (RLFC)
Hex Address: 0x090A ................ 96
Table 85:: PMON Receive Change of Frame Alignment Counter (RCFAC)
Hex Address: 0x090B ................ 96
Table 86:: PMON LAPD1 Frame Check Sequence Error Counter 1 (LFCSEC1)
Hex Address: 0x090C ................. 97
Table 87:: PRBS Bit Error Counter MSB (PBECU)
Hex Address: 0x090D ................. 97
Table 88:: PRBS Bit Error Counter LSB (PBECL)
Hex Address: 0x090E ................. 97
Table 89:: Transmit Slip Counter (TSC)
Hex Address: 0x090F ............... 98
Table 90:: Excessive Zero Violation Counter MSB (EZVCU)
Hex Address: 0x0910 ................. 98
Table 91:: Excessive Zero Violation Counter LSB (EZVCL)
Hex Address: 0x0911 ................. 98
Table 92:: PMON LAPD2 Frame Check Sequence Error Counter 2 (LFCSEC2)
Hex Address: 0x091C ................. 99
Table 93:: PMON LAPD2 Frame Check Sequence Error Counter 3 (LFCSEC3)
Hex Address: 0x092C ................. 99
Table 94:: Block Interrupt Status Register (BISR)
Hex Address: 0x0B00 .................. 100
Table 95:: Block Interrupt Enable Register (BIER)
Hex Address: 0x0B01 ................. 102
Table 96:: Alarm & Error Interrupt Status Register (AEISR)
Hex Address: 0x0B02 ................... 104
Table 97:: Alarm & Error Interrupt Enable Register (AEIER)
Hex Address: 0x0B03 .................... 106
Table 98:: Framer Interrupt Status Register (FISR)
Hex Address: 0x0B04 ................. 107
Table 99:: Framer Interrupt Enable Register (FIER)
Hex Address: 0x0B05 ................. 109
Table 100:: Data Link Status Register 1 (DLSR1)
Hex Address: 0x0B06 ............ 111
Table 101:: Data Link Interrupt Enable Register 1 (DLIER1)
Hex Address: 0x0B07 ............... 113
Table 102:: Slip Buffer Interrupt Status Register (SBISR)
Hex Address: 0x0B08 ................. 115
Table 103:: Slip Buffer Interrupt Enable Register (SBIER)
Hex Address: 0x0B09 ................ 118
Table 104:: Receive Loopback Code Interrupt and Status Register (RLCISR)
Hex Address: 0x0B0A ................. 120
Table 105:: Receive Loopback Code Interrupt Enable Register (RLCIER)
Hex Address: 0x0B0B ................. 121
Table 106:: Excessive Zero Status Register (EXZSR)
Hex Address: 0x0B0E .............. 122
Table 107:: Excessive Zero Enable Register (EXZER)
Hex Address: 0x0B0F ............ 122
Table 108:: SS7 Status Register for LAPD1 (SS7SR1)
Hex Address: 0x0B10 .............. 123
Table 109:: SS7 Enable Register for LAPD1 (SS7ER1)
Hex Address: 0x0B11 ............ 123
Table 110:: RxLOS/CRC Interrupt Status Register (RLCISR)
Hex Address: 0x0B12 ............. 124
Table 111:: RxLOS/CRC Interrupt Enable Register (RLCIER)
Hex Address: 0x0B13 ............. 124
Table 112:: Data Link Status Register 2 (DLSR2)
Hex Address: 0x0B16 ............. 125
Table 113:: Data Link Interrupt Enable Register 2 (DLIER2)
Hex Address: 0x0B17 ............... 127
Table 114:: SS7 Status Register for LAPD2 (SS7SR2)
Hex Address: 0x0B18 .............. 129
Table 115:: SS7 Enable Register for LAPD2 (SS7ER2)
Hex Address: 0x0B19 .............. 129
Table 116:: Data Link Status Register 3 (DLSR3)
Hex Address: 0x0B26 ............. 130
Table 117:: Data Link Interrupt Enable Register 3 (DLIER3)
Hex Address: 0x0B27 .............. 132
Table 118:: SS7 Status Register for LAPD3 (SS7SR3)
Hex Address: 0x0B28 ............. 134
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