S
參數(shù)資料
型號(hào)： XRT83VSH38IB
廠商： Exar Corporation
文件頁(yè)數(shù)： 75/76頁(yè)
文件大小： 0K
描述： IC LIU SH T1/E1/J1 8CH 225BGA
標(biāo)準(zhǔn)包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動(dòng)器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.14 V ~ 3.47 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應(yīng)商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤(pán)
XRT83VSH38
5
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.1.0
PIN DESCRIPTION BY FUNCTION
RECEIVE SECTION
SIGNAL NAME
BGA
LEAD #
TYPE
DESCRIPTION
RXON
K16
I
Receiver On
Hardware Mode Only
This pin is used to enable the receivers for all channels. By default, the receivers
are turned ON in hardware mode. To turn the receivers OFF, pull this pin "Low".
NOTE: Internally pulled "High" with a 50k
resistor.
RLOS0
RLOS1
RLOS2
RLOS3
RLOS4
RLOS5
RLOS6
RLOS7
C3
H4
H15
A16
V3
L2
J15
T15
O
Receive Loss of Signal
When a receive loss of signal occurs according to ITU-T G.775, the RLOS pin will go
"High" for a minimum of one RCLK cycle. RLOS will remain "High" until the loss of
signal condition clears. See the Receive Loss of Signal section of this datasheet for
more details.
NOTE: This pin can be used for redundancy applications to initiate an automatic
switch to a backup card.
RCLK0
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
B3
H3
H16
A17
U3
L3
M15
U16
O
Receive Clock Output
RCLK is the recovered clock from the incoming data stream. If the incoming signal
is absent or RTIP/RRING are in "High-Z", RCLK maintains its timing by using an
internal master clock as its reference. RPOS/RNEG data can be updated on either
edge of RCLK selected by RCLKE.
NOTE: RCLKE is a global setting that applies to all 8 channels.
RNEG/LCV0
RNEG/LCV1
RNEG/LCV2
RNEG/LCV3
RNEG/LCV4
RNEG/LCV5
RNEG/LCV6
RNEG/LCV7
A2
H2
H18
B16
T4
M4
M16
V17
O
RNEG/LCV_OF Output
In dual rail mode, this pin is the receive negative data output. In single rail mode,
this pin is a Line Code Violation / Overflow indicator Indicator. If LCV is selected by
software and if a line code violation, a bi-polar violation, or excessive zeros occur,
the LCV_OF pin will pull "High" for a minimum of one RCLK cycle. LCV_OF will
remain "High" until there are no more violations.
However, if OF (Overflow) is
selected, then the LCV_OF pin will pull "High" if the internal LCV counter is satu-
rated. The LCV_OF pin will remain "High" until the LCV counter is reset.
RPOS0
RPOS1
RPOS2
RPOS3
RPOS4
RPOS5
RPOS6
RPOS7
B2
G2
D15
B17
U2
M3
L17
T17
O
RPOS/RDATA Output
Receive digital output pin. In dual rail mode, this pin is the receive positive data out-
put. In single rail mode, this pin is the receive non-return to zero (NRZ) data output.
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XRT83VSH38IB-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 8 Channel Short-Haul RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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XRT84L38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER
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