
XRT83VSH38
64
REV. 1.1.0
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
TABLE 39: MICROPROCESSOR REGISTER 0X82H BIT DESCRIPTION
GLOBAL REGISTER (0X82H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
TxONCNTL Transmit On Control
This bit grants access to controlling the transmitter output activity.
0 = Register Bits
1 = Hardware Pins
R/W
0
D6
TERCNTL
Receive Termination Select Control
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set to the register bits
1 = Control of the receive termination is set to the RxTSEL hard-
ware pin
R/W
0
D[5:0]
Reserved
These Register Bits are Not Used
R/W
0
TABLE 40: MICROPROCESSOR REGISTER 0X83H BIT DESCRIPTION
GLOBAL REGISTER (0X83H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D{7:4]
Reserved
R/W
0
D[3:2]
SL[1:0]
Slicer Level Select
00 = 60%
01 = 65%
10 = 70%
11 = 55%
R/W
00
D[1:0]
Reserved
These Register Bits are Not Used
R/W
0