參數(shù)資料
型號: XRT83VSH316IB
廠商: Exar Corporation
文件頁數(shù): 15/98頁
文件大?。?/td> 0K
描述: IC LIU SH T1/E1/J1 16CH 316STBGA
標準包裝: 60
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 16/16
規(guī)程: T1,E1,J1
電源電壓: 3.14 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 316-LBGA
供應(yīng)商設(shè)備封裝: 316-STBGA(21x21)
包裝: 托盤
XRT83VSH316
19
16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.1
2.1
19.44MHz Output Clock Reference for Recovered Clock Synchronization
For Loop Timing Applications, the EXAR 16-channel LIIU can provide a SONET 19.44MHz clock reference that
is synchronized to one of the recovered line clocks from the T1 or E1 line interface or to an externally supplied
reference clock. Figure 3 below shows a simplified block diagram with recommend components for this
feature. The external crystall connected to XTAL1 and XTAL2 should have a minimum accuracy of +/-20ppm if
it is to be used as a SONET/SDH clock reference. The two filtering caps, C1 and C2 are recommendations
only. The value of these caps will depend on the system characteristics of the PCB, but should range from 10pf
to 20pf.
If RCLK_I/O is configured as an output, it will be connected to one of the 16 channel recovered line clocks. In
addition, the recovered line clock that is selected will be used as the reference for the 19.44MHz SONET/SDH
output clock. If RCLK_I/O is configured as an input, an external reference clock will be used to derive the
19.44MHz output clock.
FIGURE 3. 19.44MHZ OUTPUT CLOCK REFERENCE
Phase
Detector
Charge
Pump
Divide By
2,430
Divide To
8kHz
VCXO
XTAL1
Pin J1
XTAL2
Pin K1
RCLK_I/O
Pin C5
CMPOUT
Pin L1
CLK19MHz
Pin M1
16:1
MUX
RCLK1
RCLK2
RCLK3
RCLK16
19.44MHz
+/-20ppm
C1=15pF
C2=15pF
C3=0.01uF
C4=4.7uF
R1=100K
PLL Design
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