參數資料
型號： XRT83SL216IB
廠商： EXAR CORP
元件分類： 數字傳輸電路
英文描述： 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
中文描述： DATACOM, PCM TRANSCEIVER, PBGA289
封裝： 15 X 15 MM, STBGA-289
文件頁數： 4/42頁
文件大?。?/td> 317K
代理商： XRT83SL216IB
XRT83SL216
I
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
TABLE OF CONTENTS
GENERAL DESCRIPTION................................................................................................ 1
APPLICATIONS.......................................................................................................................................... 1
F
IGURE
1. B
LOCK
D
IAGRAM
OF
THE
XRT83SL216........................................................................................................................... 1
FEATURES
..................................................................................................................................................... 2
PRODUCT ORDERING INFORMATION................................................................................................. 2
F
IGURE
2. P
IN
O
UT
FOR
THE
XRT83SL216 (
BOTTOM
VIEW
)............................................................................................................. 3
T
ABLE
OF
C
ONTENTS
............................................................................................................
I
PIN DESCRIPTIONS ......................................................................................................... 4
S
ERIAL
MICROPROCESSOR
INTERFACE
........................................................................................................... 4
R
ECEIVER
S
ECTION
....................................................................................................................................... 5
T
RANSMITTER
S
ECTION
................................................................................................................................. 8
C
ONTROL
F
UNCTION
................................................................................................................................... 11
JTAG S
ECTION
........................................................................................................................................... 11
P
OWER
AND
G
ROUND
................................................................................................................................. 12
1.0 RECEIVE PATH LINE INTERFACE....................................................................................................... 15
F
IGURE
3. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
R
ECEIVE
P
ATH
L
INE
T
ERMINATION
(RTIP/RRING).................................................. 15
1.1 PEAK DETECTOR/DATA SLICER.................................................................................................................... 15
1.2 CLOCK AND DATA RECOVERY...................................................................................................................... 15
F
IGURE
4. R
ECEIVE
D
ATA
U
PDATED
ON
THE
R
ISING
E
DGE
OF
RCLK.............................................................................................. 15
F
IGURE
5. R
ECEIVE
D
ATA
U
PDATED
ON
THE
F
ALLING
E
DGE
OF
RCLK ............................................................................................ 15
T
ABLE
1: T
IMING
S
PECIFICATIONS
FOR
RCLK/RPOS/RNEG .......................................................................................................... 16
1.3 RECEIVE SENSITIVITY..................................................................................................................................... 16
F
IGURE
6. T
EST
C
ONFIGURATION
FOR
M
EASURING
R
ECEIVE
S
ENSITIVITY
........................................................................................ 16
1.4 GENERAL ALARM DETECTION AND INTERRUPT GENERATION............................................................... 16
1.4.1 RLOS (RECEIVER LOSS OF SIGNAL)........................................................................................................................ 17
1.4.2 AIS (ALARM INDICATION SIGNAL)............................................................................................................................ 17
1.4.3 LCV (LINE CODE VIOLATION DETECTION) .............................................................................................................. 17
1.5 RECEIVE JITTER ATTENUATOR..................................................................................................................... 17
1.6 HDB3 DECODER............................................................................................................................................... 17
1.7 ARAOS (AUTOMATIC RECEIVE ALL ONES).................................................................................................. 18
F
IGURE
7. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
ARAOS F
UNCTION
................................................................................................ 18
1.8 RPOS/RNEG/RCLK........................................................................................................................................... 18
F
IGURE
8. S
INGLE
R
AIL
M
ODE
W
ITH
A
F
IXED
R
EPEATING
"0011" P
ATTERN
..................................................................................... 18
F
IGURE
9. D
UAL
R
AIL
M
ODE
W
ITH
A
F
IXED
R
EPEATING
"0011" P
ATTERN
........................................................................................ 18
2.0 TRANSMIT PATH LINE INTERFACE.................................................................................................... 19
F
IGURE
10. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
T
RANSMIT
P
ATH
................................................................................................... 19
2.1 TCLK/TPOS/TNEG DIGITAL INPUTS............................................................................................................... 19
F
IGURE
11. T
RANSMIT
D
ATA
S
AMPLED
ON
F
ALLING
E
DGE
OF
TCLK ............................................................................................... 19
F
IGURE
12. T
RANSMIT
D
ATA
S
AMPLED
ON
R
ISING
E
DGE
OF
TCLK ................................................................................................. 19
T
ABLE
2: T
IMING
S
PECIFICATIONS
FOR
TCLK/TPOS/TNEG ........................................................................................................... 20
2.2 HDB3 ENCODER............................................................................................................................................... 20
T
ABLE
3: E
XAMPLES
OF
HDB3 E
NCODING
...................................................................................................................................... 20
2.3 TRANSMIT JITTER ATTENUATOR.................................................................................................................. 20
T
ABLE
4: M
AXIMUM
G
AP
W
IDTH
FOR
M
ULTIPLEXER
/M
APPER
A
PPLICATIONS
.................................................................................... 20
2.4 TAOS (TRANSMIT ALL ONES)......................................................................................................................... 21
F
IGURE
13. TAOS (T
RANSMIT
A
LL
O
NES
)...................................................................................................................................... 21
2.5 ATAOS (AUTOMATIC TRANSMIT ALL ONES) ............................................................................................... 21
F
IGURE
14. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
THE
ATAOS F
UNCTION
............................................................................................... 21
3.0 APPLICATIONS ..................................................................................................................................... 22
3.1 LOOPBACK DIAGNOSTICS............................................................................................................................. 22
3.1.1 LOCAL ANALOG LOOPBACK .................................................................................................................................... 22
F
IGURE
15. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
L
OCAL
A
NALOG
L
OOPBACK
......................................................................................... 22
3.1.2 REMOTE LOOPBACK.................................................................................................................................................. 22
F
IGURE
16. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
R
EMOTE
L
OOPBACK
.................................................................................................... 22
3.1.3 DIGITAL LOOPBACK................................................................................................................................................... 23
F
IGURE
17. S
IMPLIFIED
B
LOCK
D
IAGRAM
OF
D
IGITAL
L
OOPBACK
..................................................................................................... 23
3.2 INTERFACING THE TRANSMIT SECTION OF THE XRT83L216 TO THE LINE ............................................ 23
F
IGURE
18. I
NTERFACING
THE
XRT83L216
TO
THE
LINE
FOR
75W A
PPLICATIONS
(1 C
HANNEL
SHOWN
).......................................... 23
F
IGURE
19.
INTERFACING
THE
XRT83L216
TO
THE
L
INE
FOR
120 W A
PPLICATIONS
(1C
HANNEL
SHOWN
)....................................... 24
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相關代理商/技術參數
參數描述
XRT83SL216IB-F 功能描述:接口 - 專用 RoHS:否 制造商:Texas Instruments 產品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59
XRT83SL28 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SL28ES 功能描述:外圍驅動器與原件 - PCI 8 CH E1 LIU SH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83SL28IV 功能描述:接口 - 專用 . . RoHS:否 制造商:Texas Instruments 產品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59
XRT83SL28IV-F 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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