參數(shù)資料
型號(hào): XRT83SL216IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA289
封裝: 15 X 15 MM, STBGA-289
文件頁(yè)數(shù): 35/42頁(yè)
文件大?。?/td> 317K
代理商: XRT83SL216IB
XRT83SL216
33
REV. 1.0.0
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
D5
ATAOS_n
Automatic Transmit All Ones
If ATAOS_n is selected, an all ones pattern will be transmitted from
TTIP/TRING if the channel experiences an RLOS condition. If
RLOS does not occur, ATAOS_n will remain inactive.
"0" = Disabled
"1" = Enabled
R/W
0
D4
TAOS_n
Transmit All Ones
If TAOS_n is selected, an all ones pattern will be transmitted from
TTIP/TRING if the transmitter is turned on. Remote Loop Back
has priority over TAOS.
"0" = Disabled
"1" = Enabled
R/W
0
D3
RLAM_n
RLOS/AIS Mode Select for channel n
This bit is used to select the industry standard for declaring / clear-
ing RLOS and AIS functionality. See the Receive section of the
Line Interface description.
"0" = ITU G.775
"1" =ETSI300233
R/W
0
D2
TXOE_n
Transmit Output Enable
Upon power up, the tranmitters are tri-stated. This bit is used to
enable the transmitter for this channel if the TxOE pin is pulled
"High". If the TxOE pin is pulled "Low", all 8 transmitters are tri-
stated.
"0" = Transmitter is disabled
"1" = Transmitter is enabled if TxOE pin is pulled "High"
R/W
0
D1
RCLKinv_n
Receiver Clock Invert
This bit is used to invert receive clock update edge with respect to
RPOS/RNEG output data.
"0" =RPOS/RNEG data is updated on the rising edge of RCLK
"1" =RPOS/RNEG data is updated on the falling edge of RCLK.
R/W
0
0
D0
TCLKinv_n
Transmit Clock Invert
This bit is used to invert transmit clock sampling edge with respect
to TPOS/TNEG input data.
"0" =TPOS/TNEG data is sampled on the falling edge of TCLK
"1" =TPOS/TNEG data is sampled on the rising edge of TCLK.
R/W
0
T
ABLE
11: M
ICROPROCESSOR
R
EGISTER
B
IT
D
ESCRIPTION
C
HANNEL
C
ONTROL
R
EGISTER
(C
HANNEL
_n, where n = 0:15)
(0
X
06
H
, 0
X
09
H
, 0
X
0C
H
, 0
X
0F
H
, 0
X
12
H
, 0
X
15
H
, 0
X
18
H
, 0
X
1B
H
, 1E
H
, 0
X
21
H
, 0
X
24
H
, 0
X
27
H
, 0
X
2A
H
, 0
X
2D
H
, 0
X
30
H
, 0X33
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
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