參數(shù)資料
型號(hào): XRT83SH314IB
廠商: Exar Corporation
文件頁數(shù): 30/101頁
文件大小: 0K
描述: IC LIU T1/E1/J1 14CH 304TBGA
標(biāo)準(zhǔn)包裝: 27
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 14/14
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 304-BBGA
供應(yīng)商設(shè)備封裝: 304-PBGA(31x31)
包裝: 托盤
XRT83SH314
30
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.4
3.6.3
Setting Registers to select an Aribtrary Pulse
For T1: Address:0x0D hex
For E1: Address: 0xF4 hex, bit D0
To program the transmit output pulse, once the arbitrary pulse has been selected, write the appropriate values
into the segment registers in Table 12.
The transmit output pulse is divided into eight individual segments. Segment 1 corresponds to the beginning of
the pulse and segment 8 to end the pulse. The value for each segment can be programed individually through
a corresponding 8-bit register. In normal operation, i.e., non-arbitrary mode, codes are stored in an internal
ROM are used to generate the pulse shape, as shown in Table 12. Typical ROM values are given below in
Hex.
NOTE: The same register bank (eight registers in total) holds the values for any given line length. In other words , the user
can not load all the desired values for all the line lengths into the device at one time. If the line length is changed, a
new code must be loaded into the register bank.
3.7
DMO (Digital Monitor Output)
The driver monitor circuit is used to detect transmit driver failures by monitoring the activities at TTIP/TRING
outputs. Driver failure may be caused by a short circuit in the primary transformer or system problems at the
transmit inputs. If the transmitter of a channel has no output for more than 128 clock cycles, DMO goes "High"
until a valid transmit pulse is detected. If the DMO interrupt is enabled, the change in status of DMO will cause
the interrupt pin to go "Low". Once the status register is read, the interrupt pin will return "High" and the status
register will be reset (RUR).
3.8
Line Termination (TTIP/TRING)
The output stage of the transmit path generates standard return-to-zero (RZ) signals to the line interface for T1/
E1/J1 twisted pair or E1 coaxial cable.
The physical interface is optimized by placing the terminating
impedance inside the LIU. This allows one bill of materials for all modes of operation reducing the number of
external components necessary in system design.
The transmitter outputs only require one DC blocking
capacitor of 0.68F. For redundancy applications (or simply to tri-state the transmitters), set TxTSEL to a "1" in
the appropriate channel register. A typical transmit interface is shown in Figure 21.
TABLE 12: TYPICAL ROM VALUES
LINE DISTANCE
SEGMENT #
FEET
1
234
5678
0 - 133
24
21
20
4C
47
44
42
133 - 266
29
23
22
21
4E
4A
47
43
266 - 399
30
25
24
23
59
40
48
44
399 - 525
34
26
24
23
5F
50
48
44
525 - 655
39
28
25
23
59
50
48
44
E1
2C
2A
00
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