參數(shù)資料
型號(hào): XRT82D20
廠商: Exar Corporation
英文描述: Single Channel E1 Line Interface Unit(單通道E1線接口單元)
中文描述: 單通道E1線路接口單元(單通道素E1線接口單元)
文件頁數(shù): 4/22頁
文件大?。?/td> 236K
代理商: XRT82D20
á
SINGLE CHANNEL E1 LINE INTERFACE UNIT
XRT82D20
REV. 1.0.6
3
PIN DESCRIPTIONS
P
IN
#
S
YMBOL
T
YPE
D
ESCRIPTION
1
RLOS
O
Receiver Loss of Signal:
This pin toggles Low to indicate the loss of
signal at the receive inputs.
Receiver Loss of Clock
: With MuteRx=1, this pin will toggle low to indi-
cate a loss of clock has occurred when the receive signal is lost
(RLOS=0). When RLOS=0, no transitions occur on RClk, RPOS/RData
and RNEG outputs.
Transmitter Negative Data Input/Coding Select
.With Jitter Attenuator
enabled (pin 18=1), input activity on this pin determines whether the
device is configured to operate in single-rail or dual-rail mode. With n-rail
transmit data applied to this pin, the device is automatically configured to
operate in dual-rail mode for both transmit input and receive output.
If this pin is tied high for more than 16 clock cycles, the device is config-
ured to operate in single-rail mode with HDB3 encoding and decoding
functions enabled.
If this pin is tied low for more than 16 clock cycles, the device is config-
ured to operate in single-rail mode with AMI encoding and decoding
functions enabled. (internal pull-down).
2
ClkLOS
O
3
TNEG/CODE
I
4
RNEG/LCV
O
Receive Negative Data/Line Code Violation Output.
If the device is configured in Dual-rail mode with n-rail data applied to pin
3, then the receive negative data will be output through this pin.
If the device is configured in Single-rail mode and operate with HDB3
coding enabled, HDB3 code violation will be detected and cause this pin
to go high.
If the device is configured in Single-rail mode and with AMI coding
selected, every bipolar violation will be reported at this pin.
5
RClk
O
Receive Clock:
Output receive clock signal to the terminal equipment.
6
RPOS/RData
O
Receive Positive/ Data Output:
In Dual-rail mode, this signal is the p-rail receive output data. In Single-
rail mode, this signal is the receive output data.
7
TClk
I
Transmitter Clock Input:
Input clock signal (2.048 MHz ± 50ppm)
8
TPOS/TData
I
Transmit Positive / Data Input.
In Dual-rail mode, this signal is the p-rail transmit input data. In Single-rail
mode, this signal is the transmit input data.
9
LLoop
I
Local Loop back enable (active low):
Tie this pin low to enable analog Local Loop-back.In local loop-back
mode, transmit output data is looped back to the input of the
receiver.Input signal at RTIP and RRing are ignored. Local Loop-back
has priority over Remote and Digital Loop-back mode. See Section 2.2
for more details. (internal pull-down).
10
RLoop
I
Remote Loop Back Enable (active low):
Connect this pin to ground to enable Remote Loop-back. In Remote
Loop-back mode, transmit data at TPOS/TData and TNEG are ignored.
See Section 2.2 for more details. (internal pull-down).
11
DLoop
I
Digital Loop Back enable (active low):
Connect this pin to ground to enable Digital Local Loop-back.In Digital
loop-back mode, transmit input data after the encoder is looped back to
the jitter attenuator (if selected) and to the receive decoder. Input data at
RTIP and RRing are ignored in this mode. (internal pull-up). In this
mode, the XRT82D20 can operate only as a jitter attenuator.
相關(guān)PDF資料
PDF描述
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