參數(shù)資料
型號: XRT79L74
廠商: Exar Corporation
英文描述: 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
中文描述: 4 -通道DS3/E3自動柜員機用戶到網(wǎng)絡接口/ Combo IC對購買力平價
文件頁數(shù): 35/70頁
文件大?。?/td> 547K
代理商: XRT79L74
PRELIMINARY
XRT79L74
REV. P1.0.0
4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
33
C1
A23
E1
C23
RxGFC1/
RxIdle1
RxGFC2/
RxIdle2
RxGFC3/
RxIdle3
RxGFC4/
RxIdle4
O
O
O
O
Receive GFC Nibble Field - Output Pin/Receive Idle Sequence Indicator:
The function of these output pins depend upon whether the XRT79L74 is oper-
ating in the ATM Mode or in the High-Speed HDLC Controller Mode.
ATM Mode - RxGFC:
These pins, along with the RxGFCClk and the RxGFCMSB pins form the
Receive GFC Nibble-Field serial output port. These pins will serially output the
contents of the GFC Nibble field of each cell that is processed via the Receive
Cell Processor. This data is serially clocked out of this pin on the rising edge of
the RxGFCClk signals. The MSB of each GFC value is designated by a pulse
at the RxGFCMSB output pins.
High-Speed HDLC Controller Mode - RxIdle:
The combination of the RxIdle and ValidFCS output signals are used to convey
information about data that is being output via the Receive HDLC Controller out-
put Data bus (RxHDLCDatn_[7:0]).
If RxIdle = "High":
The Receive HDLC Controller block will drive this output pin "High" anytime the
flag sequence octet (0x7E) is present on the RxHDLCDatn[7:0] output data bus.
If RxIdle and ValidFCS are both "High":
The Receive HDLC Controller block has received a complete HDLC frame, and
has determined that the FCS value within this HDLC frame are valid.
If RxIdle is "High" and ValidFCS is "Low":
The Receive HDLC Controller block has received a complete HDLC frame, and
has determined that the FCS value within this HDLC frame is invalid.
If RxIdle is "High" and ValidFCS is "Low":
The Receive HDLC Controller block has received an ABORT sequence.
C2
B22
D3
A24
RxGFCClk1
RxGFCClk2
RxGFCClk3
RxGFCClk4
O
O
O
O
Received GFC Nibble Serial Output Port Clock Signal:
These output pins function as a part of the Receive GFC Nibble-Field Serial
Output Port, also consisting of the RxGFC and RxGFCMSB pins. These pins
provide a clock pulse which allows external circuitry to latch in the GFC Nibble-
Data via the RxGFC output pin.
N
OTE
:
These output pins are only active if the XRT79L74 is operating in the
ATM UNI Mode.
D4
A22
D2
C22
RxGFCMSB1
RxGFCMSB2
RxGFCMSB3
RxGFCMSB4
O
O
O
O
Receive GFC Nibble Field - MSB Indicator:
These output pins function as a part of the Receive GFC Nibble Field Serial
Output port which also consists of the RxGFC and RxGFCClk pins. These pins
pulse "High" the instant that the MSB (Most Significant Bit) of a GFC Nibble is
being output on the RxGFC pin.
N
OTE
:
These output pins are only active if the XRT79L74 is operating in the
ATM UNI Mode.
P
IN
#
N
AME
TYPE
D
ESCRIPTION
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