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參數(shù)資料
| 型號(hào)： | XRT79L73IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| 中文描述： | ATM NETWORK INTERFACE, PBGA456 |
| 封裝： | 27 X 27 MM, 1 MM PITCH, PLASTIC, BGA-456 |
| 文件頁數(shù)： | 42/71頁 |
| 文件大小： | 495K |
| 代理商： | XRT79L73IB |
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XRT79L73
REV. P1.0.0
PRELIMINARY
3 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC
t
40
P
IN
#
N
AME
TYPE
D
ESCRIPTION
TRANSMIT LINE SIDE SIGNALS
AE4
TxON
I
Transmit Driver ON - Channel n:
This input pin is used to either enable or disable the Transmit Output Drivers of the
XRT79L73.
"Low" - Disables the XRT79L73 Transmit Output Drivers. In this setting, the TTIP
and TRING output pins will be tri-stated.
"High" - Enables the XRT79L73 Transmit Output Drivers if the individual register
bits are set to "1". In this setting, the TTIP and TRING output pins will be enabled.
N
OTES
:
1.
Whenever the transmitters are turned off , the TTIP and TRING output
pins will be tri-stated.
2.
These pins are internally pulled high.
Y5
DS3CLK/
SFMCLK
I
Clock Recovery PLL DS3 Reference Clock Input/12.288MHz SFM
Reference Clock Input:
The exact function of this input pin depends upon whether or not the
XRT79L73 device has been configured to operate in the SFM (Single
Frequency Mode) Mode, as described below.
If the XRT79L73 device is NOT operating in the Single-Frequency ModeIf
the XRT79L73 has NOT been configured to operate in the SFM Mode,
then this input pin will functions as the Reference Clock for the Clock
Recovery PLL and the Jitter Attenuator PLL within the Receive DS3/E3
LIU Block, whenever the XRT79L73 device has been configured to operate
in the DS3 Mode.
N
OTE
:
For DS3/Non-SFM Modes of operation, the user is expected to supply a
44.736MHz ± 20ppm clock signal to this input pin.If the XRT79L73 device
is operating in the Single-Frequency Mode
If the user has configured the XRT79L73 device to operate in the SFM
Mode, then the user MUST apply a clock signal with a frequency of
12.288MHz ± 20ppm to this input pin. The SFM Synthesizer block (within
the Receive DS3/E3 LIU Block) will then synthesize one of the appropriate
line rate frequencies (e.g., 34.368MHz for E3 and 44.736MHz for DS3)
based upon this 12.288MHz Reference Clock source.
N
OTE
:
If the user does not intend to operate the XRT79L73 device in the SFM
Mode, nor the DS3 Mode, then he/she should tie this input pin to GND.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT79L74 | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74IB | 4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT8000ID | Clock Synchronizer/Adapter for Communications |
| XRT8000 | Clock Synchronizer/Adapter for Communications(用于通訊的時(shí)鐘同步設(shè)備/調(diào)整器) |
| XRT8001 | WAN Clock for T1 and E1 Systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT79L74 | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT79L74IB | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 - CHANNEL DS3/E3 ATM UNI/PPP COMBO IC |
| XRT8000 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Clock Synchronizer/Adapter for Communications |
| XRT8000_06 | 制造商:EXAR 制造商全稱:EXAR 功能描述:Clock Synchronizer/Adapter for Communications |
| XRT8000D | 制造商:EXAR 制造商全稱:EXAR 功能描述:CLOCK SYNCHRONIZER/ADAPTER FOR COMMUNICATIONS |
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