參數(shù)資料
型號(hào): XRT75VL00DIVTR
廠商: Exar Corporation
文件頁(yè)數(shù): 63/92頁(yè)
文件大小: 0K
描述: IC LIU E3/DS3/STS-1 1CH 52TQFP
標(biāo)準(zhǔn)包裝: 1,000
類(lèi)型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 52-LQFP
供應(yīng)商設(shè)備封裝: 52-TQFP(10x10)
包裝: 帶卷 (TR)
XRT75VL00D
61
E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
REV. 1.0.4
consecutive STS-1 frames.
Figure 41 presents an illustration of an STS-1 SPE straddling across two
consecutive STS-1 frames.
A PTE that is receiving and terminating an STS-1 data-stream will perform the following tasks.
It will acquire and maintain STS-1 frame synchronization with the incoming STS-1 data-stream.
Once the PTE has acquired STS-1 frame synchronization, then it will locate the J1 byte (e.g., the very byte
within the very next STS-1 SPE) within the Envelope Capacity by reading out the contents of the H1 and H2
bytes.
The H1 and H2 bytes are referred to (in the SONET standards) as the SPE Pointer Bytes. When these two
bytes are concatenated together in order to form a 16-bit word (with the H1 byte functioning as the "Most
Significant Byte") then the contents of the "lower" 10 bit-fields (within this 16-bit word) reflects the location of
the J1 byte within the Envelope Capacity of the incoming STS-1 data-stream. Figure 42 presents an illustration
of the bit format of the H1 and H2 bytes, and indicates which bit-fields are used to reflect the location of the J1
byte.
FIGURE 41. AN ILLUSTRATION OF AN STS-1 SPE STRADDLING ACROSS TWO CONSECUTIVE STS-1 FRAMES
TOH
STS-1 FRAME N
STS-1 FRAME N + 1
J1 Byte (1st byte of SPE)
J1 Byte (1st byte of next SPE)
H1, H2
Bytes
SPE can straddle across two STS-1 frames
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