參數(shù)資料
型號: XRT75L03D
廠商: Exar Corporation
英文描述: THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
中文描述: Three頻道E3/DS3/STS-1線路接口單元與SONET DESYNCHRONIZER
文件頁數(shù): 28/134頁
文件大?。?/td> 659K
代理商: XRT75L03D
XRT75L03D
REV. 1.0.0
á
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
23
67
SClk/TCLKINV
I
Microprocessor Serial Interface -Serial Clock Input:
This input pin functions as the Clock Source for the Microprocessor Serial Inter-
face.
Each time the user wishes to perform a READ or WRITE operate with the on-
chip Command Registers via the Microprocessor Serial Interface, the user
MUST do the following.
Assert the CS input pin by toggling it "Low", and
Provide 16 Clock Periods to this particular input pin for each READ and
WRITE operation.
The Microprocessor Serial Interface will sample any data residing upon the SDI
input pin, upon the rising edge of this clock signal. Further, for READ opera-
tions, the Microprocessor Serial Interface will serially output the contents of a
target Command Register upon the falling edge of this clock signal.
N
OTE
:
The maximum frequency of this particular clock signal is 10MHz.
66
CS/RCLKINV
I
Microprocessor Serial Interface - Chip Select Input:
This input pin should be pulled "Low" whenever a READ or WRITE operation is
to be executed to the on-chip Command Registers, via the Microprocessor
Serial Interface.
This input pin should remain "Low" until the READ or WRITE operation has
been completed. This input pin should be pulled "High" at all other times.
N
OTE
:
If the XRT75L03D has been configured to operate in the Host Mode then
this input pin will function as the RCLKINV input pin.
71
INT/LOSMUT
O
Microprocessor Serial Interface - Interrupt Request Output:
If the XRT75L03D has been configured to operate in the Host Mode, then this
pin becomes the Interrupt Request Output for the XRT75L03D.
During normal conditions, this output pin will be pulled "High". However, if the
user enables certain interrupts within the device, and if those conditions occur,
then the XRT75L03D will request an interrupt from the Microprocessor by tog-
gling this output pin "Low".
N
OTES
:
1.
If the XRT75L03D is configured to operate in the Hardware Mode, then
this pin functions as the LOSMUT input pin.
2.
This pin will remain "Low" until the Interrupt has been served.
101
RESET
I
Microprocessor Serial Interface - H/W RESET Input:
Pulsing this input "Low" causes the XRT75L03D to reset the contents of the on-
chip Command Registers to their default values. As a consequence, the
XRT75L03D will then also be operating in its default condition.
For normal operation pull this input pin to a logic "High".
N
OTE
:
This input pin is internally pulled high.
MICROPROCESSOR SERIAL INTERFACE - (HOST MODE)
P
IN
#
S
IGNAL
N
AME
T
YPE
D
ESCRIPTION
相關(guān)PDF資料
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XRT75L04 FOUR CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER
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