參數(shù)資料
型號: XRT73L04
廠商: Exar Corporation
英文描述: 4 Channel E3/DS3/STS-1 Line Interface Unit(4通道 E3/DS3/STS-1線接口單元)
中文描述: 4頻道E3/DS3/STS-1線路接口單元(4通道E3/DS3/STS-1線接口單元)
文件頁數(shù): 4/62頁
文件大?。?/td> 781K
代理商: XRT73L04
XRT73L04
4 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.5
á
PRELIMINARY
I
TABLE OF CONTENTS
GENERAL DESCRIPTION ................................................................................................. 1
F
EATURES
.................................................................................................................................................... 1
APPLICATIONS ......................................................................................................................................... 1
T
YPICAL
A
PPLICATIONS
................................................................................................................................. 2
T
RANSMIT
I
NTERFACE
C
HARACTERISTICS
: ..................................................................................................... 2
R
ECEIVE
I
NTERFACE
C
HARACTERISTICS
: ....................................................................................................... 2
ORDERING INFORMATION ............................................................................................... 3
PIN DESCRIPTIONS .......................................................................................................... 4
ELECTRICAL CHARACTERISTICS ................................................................................ 14
A
BSOLUTE
M
AXIMUM
R
ATINGS
.................................................................................................................... 20
SYSTEM DESCRIPTION .................................................................................................. 22
T
HE
T
RANSMIT
S
ECTION
- C
HANNELS
0, 1, 2,
AND
3 .................................................................................... 22
T
HE
R
ECEIVE
S
ECTION
- C
HANNELS
0, 1, 2
AND
3 ....................................................................................... 22
T
HE
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
................................................................................................. 22
1.0 Selecting the Data Rate .................................................................................................................... 23
1.1 C
ONFIGURING
C
HANNEL
(
N
) ............................................................................................................................... 23
C
OMMAND
R
EGISTER
, CR4-(
N
) ...................................................................................................... 25
2.0 The Transmit Section ....................................................................................................................... 26
2.1 T
HE
T
RANSMIT
L
OGIC
B
LOCK
............................................................................................................................ 26
2.1.1 Accepting Dual-Rail Data from the Terminal Equipment ...................................................................... 26
2.1.2 Accepting Single-Rail Data from the Terminal Equipment ................................................................... 27
C
OMMAND
R
EGISTER
CR3-(
N
) ....................................................................................................... 27
2.2 T
HE
T
RANSMIT
C
LOCK
D
UTY
C
YCLE
A
DJUST
C
IRCUITRY
................................................................................... 27
2.3 T
HE
HDB3/B3ZS E
NCODER
B
LOCK
.................................................................................................................. 28
2.3.1 B3ZS Encoding .................................................................................................................................... 28
2.3.2 HDB3 Encoding .................................................................................................................................... 28
2.3.3 Disabling the HDB3/B3ZS Encoder ..................................................................................................... 29
C
OMMAND
R
EGISTER
CR3-(
N
) ....................................................................................................... 29
2.4 T
HE
T
RANSMIT
P
ULSE
S
HAPING
C
IRCUITRY
....................................................................................................... 29
2.4.1 Enabling the Transmit Line Build-Out Circuit ....................................................................................... 31
C
OMMAND
R
EGISTER
, CR1-(
N
) ...................................................................................................... 31
2.4.2 Disabling the Transmit Line Build-Out Circuit ....................................................................................... 31
C
OMMAND
R
EGISTER
, CR1-(
N
) ...................................................................................................... 32
2.4.3 Design Guideline for Setting the Transmit Line Build-Out Circuit ......................................................... 32
2.4.4 The Transmit Line Build-Out Circuit and E3 Applications .................................................................... 32
2.5 I
NTERFACING
THE
T
RANSMIT
S
ECTIONS
OF
THE
XRT73L04
TO
THE
L
INE
........................................................... 32
TRANSFORMER VENDOR INFORMATION ........................................................................................... 33
3.0 The Receive Section ......................................................................................................................... 33
3.1 I
NTERFACING
THE
R
ECEIVE
S
ECTIONS
OF
THE
XRT73L04
TO
THE
L
INE
............................................................. 33
3.2 T
HE
R
ECEIVE
E
QUALIZER
B
LOCK
...................................................................................................................... 34
C
OMMAND
R
EGISTER
CR-2 (
N
) ...................................................................................................... 36
3.3 C
LOCK
R
ECOVERY
PLL .................................................................................................................................... 36
3.3.1 The Training Mode ............................................................................................................................... 36
3.3.2 The Data/Clock Recovery Mode .......................................................................................................... 36
3.4 T
HE
HDB3/B3ZS D
ECODER
............................................................................................................................. 36
3.4.1 B3ZS Decoding (DS3/STS-1 Applications) .......................................................................................... 36
3.4.2 HDB3 Decoding (E3 Applications) ....................................................................................................... 37
3.4.3 Configuring the HDB3/B3ZS Decoder .................................................................................................. 37
C
OMMAND
R
EGISTER
CR3-(
N
) ....................................................................................................... 38
3.5 LOS D
ECLARATION
/C
LEARANCE
....................................................................................................................... 38
3.5.1 The LOS Declaration/Clearance Criteria for E3 Applications ............................................................... 38
3.5.2 The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications .......................................... 39
C
OMMAND
R
EGISTER
CR0-(
N
) ....................................................................................................... 40
C
OMMAND
R
EGISTER
CR2-(
N
) ....................................................................................................... 40
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