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參數(shù)資料
| 型號： | XRT73L04 |
| 廠商： | Exar Corporation |
| 英文描述： | 4 Channel E3/DS3/STS-1 Line Interface Unit(4通道 E3/DS3/STS-1線接口單元) |
| 中文描述： | 4頻道E3/DS3/STS-1線路接口單元（4通道E3/DS3/STS-1線接口單元） |
| 文件頁數(shù)： | 11/62頁 |
| 文件大?。?/td> | 781K |
| 代理商： | XRT73L04 |
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XRT73L04
4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
PRELIMINARY
REV. P1.0.5
7
54
RNEG1/(LCV1)
O
See description of pin 60, RNEG0
55
RPOS1
O
See description of pin 61, RPOS0
56
RxDGND1
****
Receiver Digital Ground - Channel(n)
57
EXClk1
I
See description of pin 66, EXClk0
58
RxDVDD0
****
Receiver Digital Supply 3.3V + 5% Channel (n)
59
RxClk0
O
R
eceive Clock Output - Channel 0:
This output pin is the Recovered Clock signal from the incoming line sig-
nal for Channel 0. The Receive Section of Channel 0 outputs data via the
RPOS0 and RNEG0 output pins on the rising edge of this clock signal.
Configure the Receive Section of Channel 0 to update the data on the
RPOS0 and RNEG0 output pins on the falling edge of RxClk0 by doing
one of the following:
a.
Operating in the Hardware Mode
Pull the RxClkINV pin to "High".
b.
Operating in the HOST Mode
Write a "1" into the RxClkINV bit-field within the Command Register.
60
RNEG0/(LCV0)
O
Receive Negative Data Output/Line Code Violation - Channel 0:
The function of this pin is dependent on whether the 73L04 is in the
Hardware or HOST Mode (HOST/HW).
a.
Operating in the Hardware Mode
Receive Negative Data:
Setting the CS/(SR/DR) pin ”Low”, (Dual-Rail operation), there is no LCV
output and this output pin pulses "High" whenever Channel 0 has
received a Negative Polarity pulse in the incoming line signal at the
RTIP0 and RRing0 inputs.
Line Code Violation:
When CS/(SR/DR) is set “High”, (Single-Rail operation), the B3ZS/HDB3
Encoder/Decoder is activated and the Line Code Violation signal is out-
put on this pin.
b.
Operating in the HOST Mode
Receive Negative Data:
Writing a “0” to the (SR/DR)_(0) bit in the command register configures
channel0 in the Dual-Rail Mode and activates RNEG0.
Writing a “1” to (SR/DR)_0 bit of the Command Register configures the
Single-Rail Mode and activates LCV0.
N
OTE
:
If the B3ZS/HDB3 Decoder is enabled then the zero suppression
patterns in the incoming line signal (such as: "00V", "000V", "B0V",
"B00V") is not reflected at this output.
PIN #
NAME
TYPE
DESCRIPTION
相關PDF資料 |
PDF描述 |
|---|---|
| XRT73L06 | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L06IB | SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00A | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00AIV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC03A | 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L04A | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04B | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04BES | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT73L04BIV | 功能描述:外圍驅動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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