參數(shù)資料
型號(hào)： XRT73L02
廠商： Exar Corporation
英文描述： 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
中文描述： 2頻道E3/DS3/STS-1線路接口單元（2通道E3/DS3/STS-1線接口單元）
文件頁(yè)數(shù)： 26/62頁(yè)
文件大小： 716K
代理商： XRT73L02
XRT73L02
2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.1.0
á
PRELIMINARY
22
SYSTEM DESCRIPTION
A functional block diagram of the XRT73L02 E3/DS3/
STS-1 Transceiver IC is presented in Figure 6. The
XRT73L02 contains three independent transmitter
and receiver sections and a common microprocessor
interface section.
THE TRANSMIT SECTION - CHANNELS 0 AND 1
The Transmit Section of each Channel accepts TTL/
CMOS level signals from the Terminal Equipment in
either a Single-Rail or Dual-Rail format. The Transmit
Section takes this data and does the following:
Encode this data into the B3ZS format if the DS3 or
SONET STS-1 Modes have been selected, or into
the HDB3 format if the E3 Mode has been selected.
Convert the CMOS level B3ZS or HDB3 encoded
data into pulses with shapes that are compliant with
the various industry standard pulse template
requirements.
Drive these pulses onto the line via the TTIP_(n)
and TRing_(n) output pins across a 1:1 Trans-
former.
N
OTE
:
The Transmit Section drives a "1" (or a Mark) onto
the line by driving either a positive or negative polarity pulse
across the 1:1 Transformer in a given bit period. The Trans-
mit Section drives a "0" (or a Space) onto the line by driving
no pulse onto the line.
THE RECEIVE SECTION - CHANNELS 0 AND 1
The Receive Section of each Channel receives a bi-
polar signal from the line via the RTIP and RRing sig-
nals across a 1:1 Transformer or a 0.01μF Capaci-
tor. The Receive Section will do the following:
Adjust the signal level through an AGC circuit.
Optionally equalize this signal for cable loss.
Route the sliced data to the HDB3/B3ZS Decoder,
during which the original data content as transmit-
ted by the Remote Terminal Equipment is restored
to its original content.
The recovered clock and data outputs to the Local
Terminal Equipment in the form of CMOS level sig-
nals via the RPOS_(n), RNEG_(n) and RxClk_(n)
output pins.
THE MICROPROCESSOR SERIAL INTERFACE
The XRT73L02 contains two identical channels. The
Microprocessor Interface Inputs are common to both
channels. The descriptions that follow refer to Chan-
nel (n) where (n) represents Channel 0 or Channel 1.
The XRT73L02 can be configured to operate in either
the Hardware Mode or the HOST Mode.
a. Operating in the Hardware Mode
The XRT73L02 can be configured to operate in the
Hardware Mode by tying the HOST/(HW) input pin to
GND.
When the XRT73L02 is operating in the Hardware
Mode, the following is true:
1.
The Microprocessor Serial Interface block is dis-
abled.
2.
The XRT73L02 is configured via input pin set-
tings.
Each of the pins associated with the Microprocessor
Serial Interface takes on their alternative role as de-
fined in Table 1.
T
ABLE
1: R
OLE
OF
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
PINS
WHEN
THE
XRT73L02
IS
OPERATING
IN
THE
H
ARDWARE
M
ODE
When the XRT73L02 is operating in the Hardware
Mode, all of the remaining input pins become active.
b. Operating in the HOST Mode
The XRT73L02 can be configured to operate in the
HOST Mode by tying the HOST/(HW) input pin to
VDD.
When the XRT73L02 is operating in the HOST Mode,
the following is true:
1.
The Microprocessor Serial Interface block is
enabled. Writing the appropriate data into the
on-chip Command Registers makes many config-
uration selections.
2.
All of the following input pins are disabled and
should be connected to GND.
Pins 1, 60 - TxLEV_(n)
Pins 2, 59 - TAOS_(n)
Pins 30, 31 - REQEN_(n)
Pins 25, 36 - RLB_(n)
Pins 24, 37 - LLB_(n)
Pin 39 - E3_Ch_(n)
Pins 21, 41 - STS1/DS3_Ch_(n)
P
IN
#
P
IN
N
AME
F
UNCTION
WHILE
IN
HARDWARE
MODE
17
CS/(ENDECDIS)
ENDECDIS
18
SClk/(RxOFF_1)
RxOFF_1
19
SDI/(RxOFF_0)
RxOFF_0
20
SDO/(E3_Ch_0)
E3_Ch_0
42
REGR/(RxClkINV)
RxClkINV
相關(guān)PDF資料
PDF描述
XRT73L03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03B 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03BIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT73L02M 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02MES 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT73L02MIV 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT73L02MIV-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT73L02MIVTR-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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