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參數(shù)資料
| 型號： | XRD9814ACV |
| 廠商： | EXAR CORP |
| 元件分類： | 圖像傳感器 |
| 英文描述： | 3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
| 中文描述： | IMAGE SENSOR-CCD, 0.40-4.20V, SQUARE, SURFACE MOUNT |
| 封裝： | 7 X 7 X 1.40 MM, TQFP-48 |
| 文件頁數(shù)： | 21/53頁 |
| 文件大?。?/td> | 679K |
| 代理商： | XRD9814ACV |
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XRD9814/9816
21
Rev. 1.00
Minimum Capacitance (CDS Line Mode)
In general, the minimum value coupling capacitance is
limited by the amount of droop which can occur before
the input voltage range of the input amplifier is ex-
ceeded. The input capacitor droop is related to the
input bias current by:
Vdroop
Ibias n T
C
=
where I
= input bias current
n = number of pixels per line
T = pixel period
If the minimum input voltage is allowed to equal the 0V
input voltage of the XRD9814/9816, the maximum
allowable droop will be equal to the clamp level minus
the difference between the black and video levels. For
example, if Vc=4V, and the CCD video output is -2V
relative to the black level the maximum allowable
droop is equal to 2V.
Using the previous equation and assuming T=500ns,
n=3000
Note:
These are the absolute minimum capacitor require-
ments. As stated for pixel-mode, a minimum value of 68pF
is recommended.
Minimum Capacitance (S/H Line Mode)
Unlike Line or Pixel CDS modes voltage droop across
a line appears as an absolute error and is the dominant
factor in determining the minimum coupling capacitor
size.
C
Ibias n T
ε
V
min =
Maximum Capacitance (S/H Line Mode)
The maximum capacitance is determined by the
amount of time allowed to charge the coupling capaci-
tor. In order to minimize the charging time, the maxi-
mum capacitor can be set to the minimum value as
previously calculated. In this case the time required to
charge the capacitor is:
(
)
t
Rs
Rc
C
Vr
Vc
ε
V
=
+
min ln
where t = clamp pulse - width ( SYNCH
Rc = clamp resistance
Rs = signal source - resistance
Vr = input reference level
Vc = XRD9814/9816 clamp voltage
V
ε
= error voltage
Cmin = coupling capacitor
Assuming that Vr=.5 Vc=0V, V
ε
=12.5uV, Rc=100
,
Rs=500
and C=1.2uF, the minimum clamp period is
equal to 1.9mS.
C
nA
ns
V
min =
10
3000 500
2
= 7.5pF
where I
=input bias current
n=number of pixels per line
Assuming n=3000, T=500nS, I=10nA and Ve=12.5uV,
the minimum required capacitor is 1.2uF.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRD9816 | 3-Channel 16-Bit Linear CCD/CIS Sensor Signal Processors(3通道16位線性CCD/CIS 傳感信號處理器) |
| XRD9816ACV | 3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
| XRD9814 | 3-Channel 14-Bit Linear CCD/CIS Sensor Signal Processors(3通道14位線性CCD/CIS 傳感信號處理器) |
| XRD9815 | () |
| XRD9816B | 3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRD9814B | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
| XRD9814BCV | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
| XRD9816ACV | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
| XRD9816B | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
| XRD9816BCV | 制造商:EXAR 制造商全稱:EXAR 功能描述:3-Channel 14/16-Bit Linear CCD/CIS Sensor Signal Processors |
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