REV. 1.3.0 FIGURE 3. N
參數(shù)資料
型號(hào)： XR21V1412IL-0A-EB
廠商： Exar Corporation
文件頁(yè)數(shù)： 2/32頁(yè)
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR21V1412IL
產(chǎn)品培訓(xùn)模塊： UART Product Overview
XR21V141x Full-Speed USB UART Family
標(biāo)準(zhǔn)包裝： 1
主要目的： 接口，USB 2.0 至 UART
嵌入式： 否
已用 IC / 零件： XR21V1412IL
已供物品： 板
相關(guān)產(chǎn)品： XR21V1412IL32TR-F-ND - IC USB UART FIFO FULL SPD 32QFN
1016-1302-ND - IC UART FIFO USB DUAL 32QFN
其它名稱(chēng)： 1016-1301
XR21V1412
10
2-CH FULL-SPEED USB UART
REV. 1.3.0
FIGURE 3. NORMAL OPERATION RECEIVE DATA FORMAT
1.5.2.3
Wide mode receive operation with 7 or 8-bit data
Two bytes of data are loaded into the RX FIFO for each byte of data received. The first byte is the received
data. The second byte consists of the error bits and break status. Wide mode receive data format is shown in
Figure 4.
1.5.2.4
Wide mode receive operation with 9-bit data
Two bytes of data are loaded into the RX FIFO for each byte of data received. The first byte is the first 8 bits of
the received data. The 9th bit received is stored in the bit 0 of the second byte. The parity bit is not received /
checked. The remainder of the 2nd byte consists of the framing and overrun error bits and break status.
FIGURE 4. WIDE MODE RECEIVE DATA FORMAT
Error flags are also available from the ERROR_STATUS register and the interrupt packet, however these flags
are historical flags indicating that an error has occurred since the previous request. Therefore, no conclusion
can be drawn as to which specific byte(s) may have contained an actual error in this manner.
1.5.3
Rx FIFO Low Latency
In normal operation all bulk-in transfers will be of maxPacketSize (64) bytes to improve throughput and to
minimize host processing. When there are 64 bytes of data in the RX FIFO, the V1412 will acknowledge a
bulk-in request from the host and transfer the data packet. If there is less than 64 bytes in the RX FIFO, the
V1412 may NAK the bulk-in request indicating that data is not ready to transfer at that time. However, if there
is less than 64 bytes in the RX FIFO and no data has been received for more than 3 character times, the
V1412 will acknowledge the bulk-in request and transfer any data in the RX FIFO to the USB host.
In some cases, especially when the baud rate is low, this increases latency unacceptably. The V1412 has a
low latency register bit that will cause the V1412 to immediately transfer any received data in the RX FIFO to
the USB host, i.e. it will not wait for 3 character times.
The custom driver can automatically set the
1
ST byte
7, 8, or 9bit data
7 6 5 4 3 2 1 0
7=‘0’ in7bit mode
1st byte
2nd byte
9 bit mode
7
6
5
4
3
2
1
0
x
O F B P
1st byte
B = Break
F = Framing Error
O = Overrun Error
2nd byte
7 or 8 bit mode
P = Parity Error (= ‘0’ if not enabled)
7 = ‘0’ in 7 bit mode
x = ‘0’
7
6
5
4
3
2
1
0
x
O F B 8
B = Break
F = Framing Error
O = Overrun Error
x = ‘0’
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參數(shù)描述
XR21V1412IL-0B-EB 功能描述:界面開(kāi)發(fā)工具 For XR21V1412 QFN32 USB, RS232;No Cables RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V
XR21V1412IL32 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:2-CH FULL-SPEED USB UART
XR21V1412IL32-F 功能描述:USB 接口集成電路 2-Ch 12Mbps 48MHz Internal clock; UART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
XR21V1412IL32TR-F 功能描述:USB 接口集成電路 2 Chan FS USB UART w/ 256 Byte FIFO RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類(lèi)型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
XR21V1414 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:4-CH FULL-SPEED USB UART
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