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參數(shù)資料
| 型號： | XR20M1172G28-0B-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 22/55頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR XR20M1172 28TSSOP |
| 標準包裝： | 1 |
| 主要目的： | 接口，UART |
| 嵌入式： | 否 |
| 已用 IC / 零件： | XR20M1172 |
| 主要屬性： | 2 通道 |
| 次要屬性： | I²C & SPI 接口 |
| 已供物品： | 板 |
| 其它名稱： | 1016-1623 XR20M1172G28-0B-EB-ND |
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XR20M1172
29
REV. 1.2.0
TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO
IER[5]: Xoff Interrupt Enable (requires EFR bit-4=1)
Logic 0 = Disable the software flow control, receive Xoff interrupt (default).
Logic 1 = Enable the receive Xoff interrupt. See Software Flow Control section for details.
IER[6]: RTS# Output Interrupt Enable (requires EFR bit-4=1)
Logic 0 = Disable the RTS# interrupt (default).
Logic 1 = Enable the RTS# interrupt. The UART issues an interrupt when the RTS# pin makes a transition
from low to high.
IER[7]: CTS# Input Interrupt Enable (requires EFR bit-4=1)
Logic 0 = Disable the CTS# interrupt (default).
Logic 1 = Enable the CTS# interrupt. The UART issues an interrupt when CTS# pin makes a transition from
low to high.
4.4
Interrupt Status Register (ISR) - Read-Only
The UART provides multiple levels of prioritized interrupts to minimize external software interaction. The
Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the
ISR will give the user the current highest pending interrupt level to be serviced, others are queued up to be
serviced next. No other interrupts are acknowledged until the pending interrupt is serviced. The Interrupt
Source Table, Table 9, shows the data values (bit 0-5) for the interrupt priority levels and the interrupt sources
associated with each of these interrupt levels.
4.4.1
Interrupt Generation:
LSR is by any of the LSR bits 1, 2, 3, 4 and 7.
RXRDY is by RX trigger level.
RXRDY Time-out is by a 4-char plus 12 bits delay timer.
TXRDY is by TX trigger level or TX FIFO empty (or transmitter empty in auto RS-485 control).
MSR is by any of the MSR bits 0, 1, 2 and 3.
GPIO is when any of the GPIO inputs toggle.
Receive Xoff/Special character is by detection of a Xoff or Special character.
CTS# is when its transmitter toggles the input pin (from LOW to HIGH) during auto CTS flow control.
RTS# is when its receiver toggles the output pin (from LOW to HIGH) during auto RTS flow control.
4.4.2
Interrupt Clearing:
LSR interrupt is cleared by reading all characters with errors out of the RX FIFO.
RXRDY interrupt is cleared by reading data until FIFO falls below the trigger level.
RXRDY Time-out interrupt is cleared by reading RHR.
TXRDY interrupt is cleared by a read to the ISR register or writing to THR.
MSR interrupt is cleared by a read to the MSR register.
GPIO interrupt is cleared by reading the IOState register.
Xoff interrupt is cleared when Xon character(s) is received.
Special character interrupt is cleared by a read to ISR.
RTS# and CTS# flow control interrupts are cleared by a read to the MSR register.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR20M1172IG28 | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1172IG28-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1172IG28-F | 制造商:Exar Corporation 功能描述:IC DUAL UART 16MBPS 3.63V 28-TSSOP 制造商:Exar Corporation 功能描述:IC, DUAL UART, 16MBPS, 3.63V, 28-TSSOP |
| XR20M1172IG28TR-F | 功能描述:UART 接口集成電路 1.8V 2 Ch 64-byte I2C/SPI UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR20M1172IL32 | 制造商:EXAR 制造商全稱:EXAR 功能描述:TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO |
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