參數(shù)資料
型號: XR17V252IM-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 15/69頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR17V252 100TQFP
標準包裝: 1
系列: *
XR17V252
22
66 MHZ PCI BUS DUAL UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.2
1.6.9
Multi-Purpose Inputs and Outputs
The V252 provides 8 multi-purpose inputs/outputs MPIO[7:0] for general use. Each pin can be programmed to
be an input or output function. The input logic state can be set for normal or inverted level, and optionally set to
generate an interrupt. The outputs can be set to be normal HIGH or LOW state, or 3-state. Their functions and
definitions are programmed through 5 registers: MPIOINT, MPIOLVL, MPIO3T, MPIOINV and MPIOSEL. If all
8 pins are set for inputs, all 8 interrupts would be Or’ed together. The Or’ed interrupt is reported in the channel
0 UART interrupt status, see Interrupt Status Register. The pins may also be programmed to be outputs and to
the 3-state condition for signal sharing. The MPIO[0] pin can be programmed to show the Timer output. When
it is programmed to be the Timer output, all the above 5 registers lose control over the MPIO[0] pin. For details
1.6.10
MPIO REGISTER
Bit [7] represents MPIO7 pin and bit [0] represents MPIO0 pin. There are 5 registers that select, control and
monitor the 8 multipurpose inputs and outputs. Figure 9 shows the internal circuitry.
FIGURE 9. MULTIPURPOSE INPUT/OUTPUT INTERNAL CIRCUIT
MPIO
Pin [7:0]
MPIOLVL [7:0]
Read Input Level
MPIOINT [7:0]
Rising Edge
Detection
INT
OR
AND
1
0
MPIOSEL [7:0]
(Select Input=1, Output=0 )
MPIO3T [7:0]
(3-state Enable =1)
MPIOLVL [7:0]
(Output Level)
MPIOINV [7:0]
(Input Inversion Enable =1)
MPIOCKT
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