REV. 1.2.1 16 2.17 Auto Xon/Xoff (Software) Flow Control When software flow control is enabl" />
參數(shù)資料
型號: XR16L2752IJ-F
廠商: Exar Corporation
文件頁數(shù): 8/49頁
文件大?。?/td> 0K
描述: IC UART FIFO 64B DUAL 44PLCC
標(biāo)準(zhǔn)包裝: 27
特點: *
通道數(shù): 2,DUART
FIFO's: 64 字節(jié)
規(guī)程: RS232,RS485
電源電壓: 2.25 V ~ 5.5 V
帶自動流量控制功能:
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
其它名稱: 1016-1650
XR16L2752IJ-F-ND
XR16L2752
xr
2.25V TO 5.5V DUART WITH 64-BYTE FIFO
REV. 1.2.1
16
2.17
Auto Xon/Xoff (Software) Flow Control
When software flow control is enabled (See Table 15), the 2752 compares one or two sequential receive data
characters with the programmed Xon or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed values, the 2752 will halt transmission (TX) as soon as the current character has completed
transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the interrupt output
pin will be activated. Following a suspension due to a match of the Xoff character, the 2752 will monitor the
receive data stream for a match to the Xon-1,2 character. If a match is found, the 2752 will resume operation
and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon/Xoff 8-bit flow control registers to a logic 0. Following reset the user
can write any Xon/Xoff value desired for software flow control. Different conditions can be set to detect Xon/
Xoff characters (See Table 15) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters are
selected, the 2752 compares two consecutive receive characters with two software flow control 8-bit values
(Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control
mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the 2752 automatically
sends an Xoff message (when enabled) via the serial TX output to the remote modem. The 2752 sends the
Xoff-1,2 characters two-character-times (= time taken to send two characters at the programmed baud rate)
after the receive FIFO crosses the programmed trigger level (for all trigger tables A-D). To clear this condition,
the 2752 will transmit the programmed Xon-1,2 characters as soon as receive FIFO is less than one trigger
level below the programmed trigger level (for Trigger Tables A, B, and C) or when receive FIFO is less than the
trigger level minus the hysteresis value (for Trigger Table D). This hysteresis value is the same as the Auto
RTS Hysteresis value in Table 13. Table 6 below explains this when Trigger Table-B (See Table 10) is selected.
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2
characters); for example, after 2.083ms has elapsed for 9600 baud and 10-bit word length setting.
2.18
Special Character Detect
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data.
The 2752 compares each incoming receive character with Xoff-2 data. If a match exists, the received data will
be transferred to FIFO and ISR bit-4 will be set to indicate detection of special character. Although the Internal
Register Table shows Xon, Xoff Registers with eight bits of character information, the actual number of bits is
dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the number of
character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1 also
determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds with the LSB bit for the receive character.
2.19
Auto RS485 Half-duplex Control
The auto RS485 half-duplex direction control changes the behavior of the transmitter when enabled by FCTR
bit-3. By default, it de-asserts RTS# (HIGH) output following the last stop bit of the last character that has been
transmitted. This helps in turning around the transceiver to receive the remote station’s response. When the
host is ready to transmit next polling data packet again, it only has to load data bytes to the transmit FIFO. The
transmitter automatically re-asserts RTS# (LOW) output prior to sending the data. The RS485 half-duplex
direction control output can be inverted by enabling EMSR bit-3.
TABLE 6: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL
RX TRIGGER LEVEL
INT PIN ACTIVATION
XOFF CHARACTER(S) SENT
(CHARACTERS IN RX FIFO)
XON CHARACTER(S) SENT
(CHARACTERS IN RX FIFO)
8
8*
0
16
16*
8
24
24*
16
28
28*
24
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