參數(shù)資料
型號： XQ2V6000-4CG717N
廠商： Xilinx, Inc.
英文描述： QPro Virtex-II 1.5V Military QML Platform FPGAs
中文描述： QPro的Virtex - II 1.5V的軍事QML第平臺FPGA
文件頁數(shù)： 49/128頁
文件大?。?/td> 2738K
代理商： XQ2V6000-4CG717N
QPro Virtex-II 1.5V Military QML Platform FPGAs
DS122 (v1.1) January 7, 2004
Product Specification
www.xilinx.com
1-800-255-7778
49
R
DC Input and Output Levels
Values for V
IL
and V
IH
are recommended input voltages.
Values for I
OL
and I
OH
are guaranteed over the recom-
mended operating conditions at the V
OL
and V
OH
test
points. Only selected standards are tested. These are cho-
sen to ensure that all standards meet their specifications.
The selected standards are tested at minimum V
CCO
with
the respective V
OL
and V
OH
voltage levels shown. Other
standards are sample tested.
Table 36:
DC Input and Output Levels
Input/Output
Standard
V
IL
V
IH
V
OL
V, Max
V
OH
V, Min
I
OL
mA
I
OH
mA
V, Min
V, Max
V, Min
V, Max
LVTTL
(1)
– 0.5
0.8
2.0
3.6
0.4
2.4
24
– 24
LVCMOS33
– 0.5
0.8
2.0
3.6
0.4
V
CCO
– 0.4
24
– 24
LVCMOS25
– 0.5
0.7
1.7
2.7
0.4
V
CCO
– 0.4
24
– 24
LVCMOS18
– 0.5
35% V
CCO
65% V
CCO
1.95
0.4
V
CCO
– 0.4
16
– 16
LVCMOS15
– 0.5
35% V
CCO
65% V
CCO
1.7
0.4
V
CCO
– 0.4
16
– 16
PCI33_3
– 0.5
30% V
CCO
50% V
CCO
V
CCO
+ 0.5
10% V
CCO
90% V
CCO
Note 2
Note 2
PCI66_3
– 0.5
30% V
CCO
50% V
CCO
V
CCO
+ 0.5
10% V
CCO
90% V
CCO
Note 2
Note 2
PCI–X
– 0.5
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
Note 2
GTLP
– 0.5
V
REF
– 0.1
V
REF
+ 0.1
V
CCO
+ 0.5
0.6
n/a
36
n/a
GTL
– 0.5
V
REF
– 0.05
V
REF
+ 0.05
V
CCO
+ 0.5
0.4
n/a
40
n/a
HSTL I
– 0.5
V
REF
– 0.1
V
REF
+ 0.1
V
CCO
+ 0.5
0.4
V
CCO
– 0.4
8
– 8
HSTL II
– 0.5
V
REF
– 0.1
V
REF
+ 0.1
V
CCO
+ 0.5
0.4
V
CCO
– 0.4
16
– 16
HSTL III
– 0.5
V
REF
– 0.1
V
REF
+ 0.1
V
CCO
+ 0.5
0.4
V
CCO
– 0.4
24
– 8
HSTL IV
– 0.5
V
REF
– 0.1
V
REF
+ 0.1
V
CCO
+ 0.5
0.4
V
CCO
– 0.4
48
– 8
SSTL3 I
– 0.5
V
REF
– 0.2
V
REF
+ 0.2
V
CCO
+ 0.5
V
REF
– 0.6
V
REF
+ 0.6
8
– 8
SSTL3 II
– 0.5
V
REF
– 0.2
V
REF
+ 0.2
V
CCO
+ 0.5
V
REF
– 0.8
V
REF
+ 0.8
16
– 16
SSTL2 I
– 0.5
V
REF
– 0.15
V
REF
+ 0.15
V
CCO
+ 0.5
V
REF
– 0.65
V
REF
+ 0.65
7.6
– 7.6
SSTL2 II
– 0.5
V
REF
– 0.15
V
REF
+ 0.15
V
CCO
+ 0.5
V
REF
– 0.80
V
REF
+ 0.80
15.2
– 15.2
AGP
– 0.5
V
REF
– 0.2
V
REF
+ 0.2
V
CCO
+ 0.5
10% V
CCO
90% V
CCO
Note 2
Note 2
Notes:
1.
2.
3.
V
OL
and V
OH
for lower drive currents are sample tested. The DONE pin is always LVTTL 12 mA.
Tested according to the relevant specifications.
LVTTL and LVCMOS inputs have approximately 100 mV of hysteresis.
ds122_1_1.fm Page 49 Wednesday, January 7, 2004 9:15 PM
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