參數(shù)資料
型號(hào): XQ2V1000-4FG456N
廠商: XILINX INC
元件分類: FPGA
英文描述: QPro Virtex-II 1.5V Military QML Platform FPGAs
中文描述: FPGA, 1280 CLBS, 1000000 GATES, 650 MHz, PBGA456
封裝: 1 MM PITCH, MO-151AAJ-1, FBGA-456
文件頁(yè)數(shù): 22/128頁(yè)
文件大?。?/td> 2738K
代理商: XQ2V1000-4FG456N
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QPro Virtex-II 1.5V Military QML Platform FPGAs
22
www.xilinx.com
1-800-255-7778
DS122 (v1.1) January 7, 2004
Product Specification
R
Shift Registers
Each function generator can also be configured as a 16-bit
shift register. The write operation is synchronous with a
clock input (CLK) and an optional clock enable, as shown in
Figure 22
. A dynamic read access is performed through the
4-bit address bus, A[3:0]. The configurable 16-bit shift regis-
ter cannot be set or reset. The read is asynchronous, how-
ever, the storage element or flip-flop is available to
implement a synchronous read. The storage element
should always be used with a constant address. For exam-
ple, when building an 8-bit shift register and configuring the
addresses to point to the seventh bit, the eighth bit can be
the flip-flop. The overall system performance is improved by
using the superior clock-to-out of the flip-flops.
An additional dedicated connection between shift registers
allows connecting the last bit of one shift register to the first
bit of the next, without using the ordinary LUT output. (See
Figure 23
.) Longer shift registers can be built with dynamic
access to any bit in the chain. The shift register chaining
and the MUXF5, MUXF6, and MUXF7 multiplexers allow up
to a 128-bit shift register with addressable access to be
implemented in one CLB.
Figure 22:
Shift Register Configurations
A[3:0]
SHIFTIN
SHIFTOUT
D(BY)
D
MC15
DI
WSG
CE (SR)
CLK
SRLC16
D
Q
SHIFT-REG
WE
CK
A[4:1]
Output
Registered
Output
(optional)
4
DS031_05_110600
WS
Figure 23:
Cascadable Shift Register
SRLC16
MC15
MC15
D
SRLC16
DI
SHIFTIN
CASCADABLE OUT
SLICE S0
SLICE S1
SLICE S2
SLICE S3
1 Shift Chain
in CLB
CLB
DS031_06_110200
FF
FF
D
SRLC16
MC15
MC15
D
SRLC16
DI
SHIFTIN
SHIFTOUT
FF
FF
D
SRLC16
MC15
MC15
D
SRLC16
DI
DI
SHIFTIN
IN
SHIFTOUT
FF
FF
D
SRLC16
MC15
MC15
D
SRLC16
DI
SHIFTOUT
FF
FF
D
DI
DI
DI
OUT
ds122_1_1.fm Page 22 Wednesday, January 7, 2004 9:15 PM
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