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| 型號(hào)： | XQ2V1000-4CF1144N |
| 廠商： | Xilinx, Inc. |
| 英文描述： | QPro Virtex-II 1.5V Military QML Platform FPGAs |
| 中文描述： | QPro的Virtex - II 1.5V的軍事QML第平臺(tái)FPGA |
| 文件頁(yè)數(shù)： | 48/128頁(yè) |
| 文件大小： | 2738K |
| 代理商： | XQ2V1000-4CF1144N |
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QPro Virtex-II 1.5V Military QML Platform FPGAs
48
www.xilinx.com
1-800-255-7778
DS122 (v1.1) January 7, 2004
Product Specification
R
Power-On Power Supply Requirements
Xilinx FPGAs require a certain amount of supply current
during power-on to ensure proper device operation. The
actual current consumed depends on the power-on ramp
rate of the power supply.
The V
CCINT
, V
CCAUX
, and V
CCO
power supplies shall each
ramp on no faster than 200
μ
s and no slower than 50 ms.
Ramp on is defined as: 0 V
DC
to minimum supply voltages.
Table 35
shows the minimum current required by QPro
Virtex-II devices
for proper power on and configuration.
Power supplies can be turned on in any sequence.
If any V
CCO
bank powers up before V
CCAUX
, then each bank
draws up to 300 mA, worst case, until the V
CCAUX
powers
on
1
. This does not harm the device. If the current is limited
to the minimum value above, or larger, the device powers on
properly after all three supplies have passed through their
power on reset threshold voltages.
Once initialized and configured, use the power calculator to
estimate current drain on these supplies.
General Power Supply Requirements
Proper decoupling of all FPGA power supplies is essential.
Consult Xilinx Application Note
XAPP623
for detailed infor-
mation on power distribution system design.
V
CCAUX
powers critical resources in the FPGA. Thus,
V
CCAUX
is especially susceptible to power supply noise.
Changes in V
CCAUX
voltage outside of 200 mV peak to peak
should take place at a rate no faster than 10 mV per milli-
second. Techniques to help reduce jitter and period distor-
tion are provided in Xilinx Answer Record 13756, available
at
www.support.xilinx.com
.
V
CCAUX
can share a power plane with 3.3V V
CCO
, but only if
V
CCO
does not have excessive noise. Using simultaneously
switching output (SSO) limits are essential for keeping
power supply noise to a minimum. Refer to
XAPP689
,
“Managing Ground Bounce in Large FPGAs,” to determine
the number of simultaneously switching outputs allowed per
bank at the package level.
Table 34:
Quiescent Supply Current
Symbol
Description
Device
Min
Typical
Max
Units
I
CCINTQ
Quiescent V
CCINT
supply current
XQ2V1000
XQ2V3000
XQ2V6000
-
100
200
250
0.50
1.30
1.50
A
I
CCOQ
Quiescent V
CCO
supply current
(1,2)
XQ2V1000
XQ2V3000
XQ2V6000
-
1.0
2.0
2.0
6.25
6.25
6.25
mA
I
CCAUXQ
Quiescent V
CCAUX
supply current
(1,2)
XQ2V1000
XQ2V3000
XQ2V6000
-
10
20
25
30
95
95
mA
Notes:
1.
2.
3.
4.
With no output current loads and no active input pull-up resistors. All I/O pins are 3-stated and floating.
If DCI or differential signaling is used, more accurate values can be obtained by using the Power Estimator or XPOWER.
Data are retained even if V
CCO
drops to 0 V.
Values specified for quiescent supply current parameters are Military Grade.
1. The 300 mA is transient current (peak). It eventually disappears even if VCCAUX does not power up.
Table 35:
Maximum Power On Current Required for
QPro Virtex-II Devices
Current
Device (mA)
XQ2V1000
XQ2V3000
XQ2V6000
I
CCINTMAX
500
1300
1500
I
CCAUXMAX
30
95
95
I
CCOMAX
6.25
6.25
6.25
Notes:
1.
Values specified for power on current parameters are Military
Grade.
I
values listed here apply to the entire device (all
banks).
2.
ds122_1_1.fm Page 48 Wednesday, January 7, 2004 9:15 PM
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| XQ2V1000-4CG717M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs |
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| XQ2V1000-4FG456M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Military QML Platform FPGAs |
| XQ2V1000-4FG456N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Platform FPGAs |
| XQ2V1000-BG575I | 制造商:XILINX 制造商全稱:XILINX 功能描述:QPro Virtex-II 1.5V Platform FPGAs |
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