參數(shù)資料
型號(hào): XPC860TZP66D4
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 240 x 64 pixel format, CFL, LED, or EL Backlight available
中文描述: 32-BIT, 66 MHz, RISC PROCESSOR, PBGA357
封裝: PLASTIC, BGA-357
文件頁(yè)數(shù): 34/76頁(yè)
文件大?。?/td> 857K
代理商: XPC860TZP66D4
34
MPC860 Family Hardware Specifications
MOTOROLA
Bus Signal Timing
Figure 9-23. Interrupt Detection Timing for External Edge Sensitive Lines
Table 9-8 shows the PCMCIA timing for the MPC860.
Table 9-8. PCMCIA Timing
Num
Characteristic
33 MHz
40 MHz
50 MHz
66 MHz
Unit
Min
Max
Min
Max
Min
Max
Min
Max
P44
A(0:31), REG valid to PCMCIA
Strobe asserted
1
20.73
16.75
13.00
9.36
ns
P45
A(0:31), REG valid to ALE negation
1
28.30
23.00
18.00
13.15
ns
P46
CLKOUT to REG valid
7.58
15.58
6.25
14.25
5.00
13.00
3.79
11.84
ns
P47
CLKOUT to REG invalid
8.58
7.25
6.00
4.84
ns
P48
CLKOUT to CE1, CE2 asserted
7.58
15.58
6.25
14.25
5.00
13.00
3.79
11.84
ns
P49
CLKOUT to CE1, CE2 negated
7.58
15.58
6.25
14.25
5.00
13.00
3.79
11.84
ns
P50
CLKOUT to PCOE, IORD, PCWE,
IOWR assert time
11.00
11.00
11.00
11.00
ns
P51
CLKOUT to PCOE, IORD, PCWE,
IOWR negate time
2.00
11.00
2.00
11.00
2.00
11.00
2.00
11.00
ns
P52
CLKOUT to ALE assert time
7.58
15.58
6.25
14.25
5.00
13.00
3.79
10.04
ns
P53
CLKOUT to ALE negate time
15.58
14.25
13.00
11.84
ns
P54
PCWE, IOWR negated to D(0:31)
invalid
1
5.58
4.25
3.00
1.79
ns
P55
WAITA and WAITB valid to CLKOUT
rising edge
1
8.00
8.00
8.00
8.00
ns
P56
CLKOUT rising edge to WAITA and
WAITB invalid
1
2.00
2.00
2.00
2.00
ns
CLKOUT
IRQx
I41
I42
I43
I43
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